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- research-articleJune 2011
SEAL: soft error aware low power scheduling by Monte Carlo state space under the influence of stochastic spatial and temporal dependencies
DAC '11: Proceedings of the 48th Design Automation ConferencePages 134–139https://doi.org/10.1145/2024724.2024755A processor's performance and power consumption are tied; an increased performance demands more power, and vice versa. An optimal tradeoff can only be achieved by an improved prediction of the task execution times, prior to an efficient scheduling. ...
- ArticleNovember 2003
Communication-Aware Task Scheduling and Voltage Selection for Total Systems Energy Minimization
ICCAD '03: Proceedings of the 2003 IEEE/ACM international conference on Computer-aided designPage 510In this paper, we present an interprocessor communication-aware task scheduling algorithm applicable to a multiprocessor system executing an application with dependent tasks. Our algorithm takes the application task graph and the architecture graph as ...
- ArticleSeptember 1995
Power analysis and low-power scheduling techniques for embedded DSP software
ISSS '95: Proceedings of the 8th international symposium on System synthesisPages 110–115https://doi.org/10.1145/224486.224525Abstract: This paper describes the application of a measurement based power analysis technique for an embedded DSP processor. An instruction-level power model for the processor has been developed using this technique. Significant points of difference ...
