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- research-articleFebruary 2023
A novel method for optimizing energy consumption in wireless sensor network using genetic algorithm
Microprocessors & Microsystems (MSYS), Volume 96, Issue Chttps://doi.org/10.1016/j.micpro.2022.104749AbstractAdvancements in information technology and wireless sensors networks (WSN) create new possibilities in a variety of industries, including environmental testing, healthcare, and industrial control. The sensor has become more intelligent,...
- research-articleNovember 2022
Extensive performance analysis of OpenDayLight (ODL) and Open Network Operating System (ONOS) SDN controllers
Microprocessors & Microsystems (MSYS), Volume 95, Issue Chttps://doi.org/10.1016/j.micpro.2022.104715AbstractThe term Software Defined Network or SDN is one of the many emerging technologies that has been revolutionizing the concept of networking. By decoupling the Data and Control plane, it has lot to offer in the field of information technology. The ...
- research-articleSeptember 2022
Evaluation of gem5 for performance modeling of ARM Cortex-R based embedded SoCs
Microprocessors & Microsystems (MSYS), Volume 93, Issue Chttps://doi.org/10.1016/j.micpro.2022.104599AbstractARM CPUs are prevalent in embedded systems ranging from low-power IoT to reasonably high-powered mobile phones and devices. Embedded SoCs integrate a number of accelerators with CPUs to achieve the tight performance and power budget. ...
- research-articleSeptember 2022
LIMITLESS — LIght-weight MonItoring Tool for LargE Scale Systems
Microprocessors & Microsystems (MSYS), Volume 93, Issue Chttps://doi.org/10.1016/j.micpro.2022.104586AbstractThis work presents LIMITLESS, a HPC framework that provides new strategies for monitoring clusters. LIMITLESS is a scalable light-weight monitor that is integrated with other HPC runtimes in order to obtain a holistic view of the ...
- research-articleApril 2020
Implementation of energy efficient circuit design using A* algorithm in embedded network
Microprocessors & Microsystems (MSYS), Volume 74, Issue Chttps://doi.org/10.1016/j.micpro.2020.103034AbstractIn wireless sensor network, the routing path plays a prominent role in network resource utilization. Since, the nodes in network are open to physical abuse an effective routing protocol is necessary to improve data reliability in network and to ...
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- research-articleFebruary 2020
Adaptive battery aware power management of a computer with self power-managed components
Microprocessors & Microsystems (MSYS), Volume 72, Issue Chttps://doi.org/10.1016/j.micpro.2019.102947AbstractDynamic power management strategies are generally used to achieve efficient power consumption of battery operated computer systems. Such computer systems usually integrate a number of built-in power-management policies. These policies ...
- research-articleSeptember 2019
Exploring operational profiles and anomalies in computer performance logs
Microprocessors & Microsystems (MSYS), Volume 69, Issue CPages 1–15https://doi.org/10.1016/j.micpro.2019.05.007Highlights- An original multidimensional analysis is proposed to characterize computer system operational profiles and possible anomalies.
Operational/functional problems in computer systems can be identified by monitoring and exploring performance metrics. These metrics can also be used to evaluate system activity profiles and manage relevant infrastructure (hardware and ...
- research-articleJune 2019
A gem5 trace-driven simulator for fast architecture exploration of OpenMP workloads
Microprocessors & Microsystems (MSYS), Volume 67, Issue CPages 42–55https://doi.org/10.1016/j.micpro.2019.01.008AbstractArchitecture parameter exploration is one of the main analysis that needs to be performed in order to ensure that a multicore system has an optimal set of parameters. The main drawback of current simulation approaches is the long ...
- research-articleApril 2019
Linux page fault analysis in android systems
Microprocessors & Microsystems (MSYS), Volume 66, Issue CPages 10–18https://doi.org/10.1016/j.micpro.2019.01.006AbstractIn modern smartphones, system performances are tightly related to a variety of underlying subsystems. In particular, internal storage, along the years, has become crucial because it is extensively used to access content relevant to the ...
- research-articleNovember 2017
Early miss prediction based periodic cache bypassing for high performance GPUs
Microprocessors & Microsystems (MSYS), Volume 55, Issue CPages 44–54https://doi.org/10.1016/j.micpro.2017.09.007The aim of the hierarchical cache memories that are equipped for GPUs is the management of irregular memory access patterns for general purpose workloads. The level-1 data cache (L1D) of the GPU plays an important role for its ability in the provision ...
- research-articleJuly 2017
Energy-Aware on-chip virtual machine placement for cloud-supported cyber-physical systems
Microprocessors & Microsystems (MSYS), Volume 52, Issue CPages 427–437https://doi.org/10.1016/j.micpro.2016.07.013Recent trends in the design of cyber-physical systems (CPS) are moving towards heterogeneous multi-core architectures with cloud support. In this paper, we propose an energy-aware scheme for virtual machine placement in cloud-supported CPS with Network-...
- research-articleNovember 2016
Application performance prediction method based on cross-core performance interference on multi-core processor
Microprocessors & Microsystems (MSYS), Volume 47, Issue PAPages 112–120https://doi.org/10.1016/j.micpro.2016.05.006Due to the contention for shared resource, applications deployed on different cores would suffer from the performance interference. Therefore, how to predict applications performance reasonably has become the hotspot in current studies. A challenges of ...
- research-articleJune 2016
Accurate energy modeling for many-core static schedules with streaming applications
Microprocessors & Microsystems (MSYS), Volume 43, Issue CPages 14–25https://doi.org/10.1016/j.micpro.2016.01.008Many-core systems provide a great performance potential with the massively parallel hardware structure. Yet, these systems are facing increasing challenges such as high operating temperatures, high electrical bills, unpleasant noise levels due to active ...
- articleJune 2011
Exploiting dynamic micro-architecture usage in gate sizing
Microprocessors & Microsystems (MSYS), Volume 35, Issue 4Pages 417–425https://doi.org/10.1016/j.micpro.2011.03.002Modern high performance microprocessors incorporate an abundance of replicated structural components. Many of these components often experience substantially lower utilization while executing a diverse pool of applications. To recover energy efficiency ...
- articleJune 2011
Architecting high-performance energy-efficient soft error resilient cache under 3D integration technology
Microprocessors & Microsystems (MSYS), Volume 35, Issue 4Pages 371–381https://doi.org/10.1016/j.micpro.2011.01.004Radiation-induced soft error has become an emerging reliability threat to high performance microprocessor design. As the size of on chip cache memory steadily increased for the past decades, resilient techniques against soft errors in cache are becoming ...
- articleMay 2011
FILESPPA: Fast Instruction Level Embedded System Power and Performance Analyzer
Microprocessors & Microsystems (MSYS), Volume 35, Issue 3Pages 329–342https://doi.org/10.1016/j.micpro.2011.01.005In the low power embedded systems design, it is important to analyze and optimize both the hardware and the software components of the system. The power consumption evaluation of the embedded systems is very slow procedure using the instruction-level ...
- articleMay 2011
Study of the performance impact of a cache buffer in solid-state disks
Microprocessors & Microsystems (MSYS), Volume 35, Issue 3Pages 359–369https://doi.org/10.1016/j.micpro.2010.09.010An SSD generally has a small memory, called cache buffer, to increase its performance and the frequently accessed data are maintained in this cache buffer. These cached data must periodically write back to the NAND Flash memory to prevent the data loss ...
- articleMay 2009
Evolution in architectures and programming methodologies of coarse-grained reconfigurable computing
Microprocessors & Microsystems (MSYS), Volume 33, Issue 3Pages 161–178https://doi.org/10.1016/j.micpro.2008.10.003In order to meet the increased computational demands of, e.g., multimedia applications, such as video processing in HDTV, and communication applications, such as baseband processing in telecommunication systems, the architectures of reconfigurable ...
- articleMarch 2009
Dictionary-based program compression on customizable processor architectures
Microprocessors & Microsystems (MSYS), Volume 33, Issue 2Pages 139–153https://doi.org/10.1016/j.micpro.2008.10.001The size of the program code has become a critical design constraint in embedded systems, especially in handheld devices. Large program codes require large memories, which increase the size and cost of the chip. In addition, the power consumption is ...
- articleOctober 2008
On the performance benefits of sharing and privatizing second and third-level cache memories in homogeneous multi-core architectures
Microprocessors & Microsystems (MSYS), Volume 32, Issue 7Pages 405–412https://doi.org/10.1016/j.micpro.2008.06.002The benefits and deficiencies of shared and private caches have been identified by researchers. The performance impact of privatizing or sharing caches on homogeneous multi-core architectures is less understood. This paper investigates the performance ...