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- ArticleMarch 2005
An Iterative Algorithm for Battery-Aware Task Scheduling on Portable Computing Platforms
DATE '05: Proceedings of the conference on Design, Automation and Test in Europe - Volume 1Pages 622–627https://doi.org/10.1109/DATE.2005.62In this work we consider battery powered portable systems which either have Field Programmable Gate Arrays (FPGA) or voltage and frequency scalable processors as their main processing element. An application is modeled in the form of a precedence task ...
- ArticleMarch 2005
A Time Slice Based Scheduler Model for System Level Design
DATE '05: Proceedings of the conference on Design, Automation and Test in Europe - Volume 1Pages 378–383https://doi.org/10.1109/DATE.2005.41Efficient evaluation of design choices, in terms of selection of algorithms to be implemented as hardware or software, and finding an optimal hw/sw design mix is an important requirement in the design flow of Embedded Systems. Time-to-market, faster ...
- ArticleMarch 2005
Test Planning for Mixed-Signal SOCs with Wrapped Analog Cores
DATE '05: Proceedings of the conference on Design, Automation and Test in Europe - Volume 1Pages 50–55https://doi.org/10.1109/DATE.2005.303Many SOCs today contain both digital and analog embedded cores. Even though the test cost for such mixed-signal SOCs is significantly higher than that for digital SOCs, most prior research in this area has focused exclusively on digital cores. We ...
- ArticleMarch 2005
TDMA Time Slot and Turn Optimization with Evolutionary Search Techniques
DATE '05: Proceedings of the conference on Design, Automation and Test in Europe - Volume 1Pages 312–317https://doi.org/10.1109/DATE.2005.299In this paper we present arithmetic real-coded variation operators tailored for time slot and turn optimization on TDMA-scheduled resources with evolutionary algorithms. Our operators implement a heuristic strategy to converge towards the solution space ...
- ArticleMarch 2005
Specification Test Compaction for Analog Circuits and MEMS
DATE '05: Proceedings of the conference on Design, Automation and Test in Europe - Volume 1Pages 164–169https://doi.org/10.1109/DATE.2005.277Testing a non-digital integrated system against all of its specifications can be quite expensive due to the elaborate test application and measurement setup required.We propose to eliminate redundant tests by employing ε-SVM based statistical ...
- ArticleMarch 2005
Scheduling of Soft Real-Time Systems for Context-Aware Applications
DATE '05: Proceedings of the conference on Design, Automation and Test in Europe - Volume 1Pages 318–323https://doi.org/10.1109/DATE.2005.265Context-aware applications pose new challenges, including a need for new computational models, uncertainty management, and efficient optimization under uncertainty. Uncertainty can arise at two levels: multiple and single tasks. When a mobile user ...
- ArticleMarch 2005
Quasi-Static Voltage Scaling for Energy Minimization with Time Constraints
DATE '05: Proceedings of the conference on Design, Automation and Test in Europe - Volume 1Pages 514–519https://doi.org/10.1109/DATE.2005.250Supply voltage scaling and adaptive body-biasing are important techniques that help to reduce the energy dissipation of embedded systems. This is achieved by dynamically adjusting the voltage and performance settings according to the application needs. ...
- ArticleMarch 2005
Q-DPM: An Efficient Model-Free Dynamic Power Management Technique
DATE '05: Proceedings of the conference on Design, Automation and Test in Europe - Volume 1Pages 526–527https://doi.org/10.1109/DATE.2005.247When applying Dynamic Power Management (DPM) technique to pervasively deployed embedded systems, the technique needs to be very efficient so that it is feasible to implement the technique on low end processor and tight-budget memory. Furthermore, it ...
- ArticleMarch 2005
On the Analysis of Reed Solomon Coding for Resilience to Transient/Permanent Faults in Highly Reliable Memories
DATE '05: Proceedings of the conference on Design, Automation and Test in Europe - Volume 1Pages 580–585https://doi.org/10.1109/DATE.2005.227Single Event Upsets (SEU) as well as permanent faults can significantly affect the correct on-line operation of digital systems, such as memories and microprocessors; a memory can be made resilient to permanent and transient faults by using modular ...
- ArticleMarch 2005
Instruction Scheduling for Dynamic Hardware Configurations
DATE '05: Proceedings of the conference on Design, Automation and Test in Europe - Volume 1Pages 100–105https://doi.org/10.1109/DATE.2005.184Although the huge reconfiguration latency of the available FPGA platforms is a well-known shortcoming of the current FCCMs, little research in instruction scheduling has been undertaken to eliminate or diminish its negative influence on performance. In ...
- ArticleMarch 2005
A Hybrid Prefetch Scheduling Heuristic to Minimize at Run-Time the Reconfiguration Overhead of Dynamically Reconfigurable Hardware
DATE '05: Proceedings of the conference on Design, Automation and Test in Europe - Volume 1Pages 106–111https://doi.org/10.1109/DATE.2005.18Due to the emergence of highly dynamic multimedia applications there is a need for flexible platforms and run-time scheduling support for embedded systems. Dynamic Reconfigurable Hardware (DRHW) is a promising candidate to provide this flexibility but, ...
- ArticleMarch 2005
Functional Validation of System Level Static Scheduling
DATE '05: Proceedings of the conference on Design, Automation and Test in Europe - Volume 1Pages 542–547https://doi.org/10.1109/DATE.2005.164Increase in system level modeling has given rise to a need for efficient functional validation of models above cycle accurate level. This paper presents a technique for comparing system level models, before and after the static scheduling of tasks on ...
