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- research-articleFebruary 2014
High-performance fractal coherence
ACM SIGPLAN Notices (SIGPLAN), Volume 49, Issue 4Pages 701–714https://doi.org/10.1145/2644865.2541982Bugs in cache coherence protocols can cause system failures. Despite many advances, verification runs into state explosion for even moderately-sized systems. As multicores' core counts increase, coherence verifiability continues to be a key problem. A ...
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ASPLOS '14: Proceedings of the 19th international conference on Architectural support for programming languages and operating systems: ISBN 9781450323055 - research-articleFebruary 2014
SI-TM: reducing transactional memory abort rates through snapshot isolation
ACM SIGPLAN Notices (SIGPLAN), Volume 49, Issue 4Pages 383–398https://doi.org/10.1145/2644865.2541952Transactional memory represents an attractive conceptual model for programming concurrent applications. Unfortunately, high transaction abort rates can cause significant performance degradation. Conventional transactional memory realizations not only ...
Also Published in:
ASPLOS '14: Proceedings of the 19th international conference on Architectural support for programming languages and operating systems: ISBN 9781450323055 - research-articleFebruary 2014
Ubik: efficient cache sharing with strict qos for latency-critical workloads
ACM SIGPLAN Notices (SIGPLAN), Volume 49, Issue 4Pages 729–742https://doi.org/10.1145/2644865.2541944Chip-multiprocessors (CMPs) must often execute workload mixes with different performance requirements. On one hand, user-facing, latency-critical applications (e.g., web search) need low tail (i.e., worst-case) latencies, often in the millisecond range, ...
Also Published in:
ASPLOS '14: Proceedings of the 19th international conference on Architectural support for programming languages and operating systems: ISBN 9781450323055