Export Citations
Save this search
Please login to be able to save your searches and receive alerts for new content matching your search criteria.
- articleJune 2018
Deep neural networks compiler for a trace-based accelerator (short WIP paper)
Deep Neural Networks (DNNs) are the algorithm of choice for image processing applications. DNNs present highly parallel workloads that lead to the emergence of custom hardware accelerators. Deep Learning (DL) models specialized in different tasks ...
Also Published in:
LCTES 2018: Proceedings of the 19th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems: ISBN 9781450358033 - research-articleJune 2018
Write-rationing garbage collection for hybrid memories
Emerging Non-Volatile Memory (NVM) technologies offer high capacity and energy efficiency compared to DRAM, but suffer from limited write endurance and longer latencies. Prior work seeks the best of both technologies by combining DRAM and NVM in hybrid ...
Also Published in:
PLDI 2018: Proceedings of the 39th ACM SIGPLAN Conference on Programming Language Design and Implementation: ISBN 9781450356985 - research-articleJune 2018
Spatial: a language and compiler for application accelerators
- David Koeplinger,
- Matthew Feldman,
- Raghu Prabhakar,
- Yaqi Zhang,
- Stefan Hadjis,
- Ruben Fiszel,
- Tian Zhao,
- Luigi Nardi,
- Ardavan Pedram,
- Christos Kozyrakis,
- Kunle Olukotun
ACM SIGPLAN Notices (SIGPLAN), Volume 53, Issue 4Pages 296–311https://doi.org/10.1145/3296979.3192379Industry is increasingly turning to reconfigurable architectures like FPGAs and CGRAs for improved performance and energy efficiency. Unfortunately, adoption of these architectures has been limited by their programming models. HDLs lack abstractions for ...
Also Published in:
PLDI 2018: Proceedings of the 39th ACM SIGPLAN Conference on Programming Language Design and Implementation: ISBN 9781450356985 - research-articleMarch 2018
Espresso: Brewing Java For More Non-Volatility with Non-volatile Memory
Fast, byte-addressable non-volatile memory (NVM) embraces both near-DRAM latency and disk-like persistence, which has generated considerable interests to revolutionize system software stack and programming models. However, it is less understood how NVM ...
Also Published in:
ASPLOS '18: Proceedings of the Twenty-Third International Conference on Architectural Support for Programming Languages and Operating Systems: ISBN 9781450349116 - research-articleMarch 2018
Devirtualizing Memory in Heterogeneous Systems
ACM SIGPLAN Notices (SIGPLAN), Volume 53, Issue 2Pages 637–650https://doi.org/10.1145/3296957.3173194Accelerators are increasingly recognized as one of the major drivers of future computational growth. For accelerators, shared virtual memory (VM) promises to simplify programming and provide safe data sharing with CPUs. Unfortunately, the overheads of ...
Also Published in:
ASPLOS '18: Proceedings of the Twenty-Third International Conference on Architectural Support for Programming Languages and Operating Systems: ISBN 9781450349116 -
- research-articleMarch 2018
MAERI: Enabling Flexible Dataflow Mapping over DNN Accelerators via Reconfigurable Interconnects
ACM SIGPLAN Notices (SIGPLAN), Volume 53, Issue 2Pages 461–475https://doi.org/10.1145/3296957.3173176Deep neural networks (DNN) have demonstrated highly promising results across computer vision and speech recognition, and are becoming foundational for ubiquitous AI. The computational complexity of these algorithms and a need for high energy-efficiency ...
Also Published in:
ASPLOS '18: Proceedings of the Twenty-Third International Conference on Architectural Support for Programming Languages and Operating Systems: ISBN 9781450349116 - research-articleMarch 2018
In-Memory Data Parallel Processor
Recent developments in Non-Volatile Memories (NVMs) have opened up a new horizon for in-memory computing. Despite the significant performance gain offered by computational NVMs, previous works have relied on manual mapping of specialized kernels to the ...
Also Published in:
ASPLOS '18: Proceedings of the Twenty-Third International Conference on Architectural Support for Programming Languages and Operating Systems: ISBN 9781450349116 - research-articleMarch 2018
Liquid Silicon-Monona: A Reconfigurable Memory-Oriented Computing Fabric with Scalable Multi-Context Support
ACM SIGPLAN Notices (SIGPLAN), Volume 53, Issue 2Pages 214–228https://doi.org/10.1145/3296957.3173167With the recent trend of promoting Field-Programmable Gate Arrays (FPGAs) to first-class citizens in accelerating compute-intensive applications in networking, cloud services and artificial intelligence, FPGAs face two major challenges in sustaining ...
Also Published in:
ASPLOS '18: Proceedings of the Twenty-Third International Conference on Architectural Support for Programming Languages and Operating Systems: ISBN 9781450349116 - articleSeptember 2017
Hardware software co-design in Haskell
ACM SIGPLAN Notices (SIGPLAN), Volume 52, Issue 10Pages 162–173https://doi.org/10.1145/3156695.3122970We present a library in Haskell for programming Field Programmable Gate Arrays (FPGAs), including hardware software co-design. Code for software (in C) and hardware (in VHDL) is generated from a single program, along with the code to support ...
Also Published in:
Haskell 2017: Proceedings of the 10th ACM SIGPLAN International Symposium on Haskell: ISBN 9781450351829 - articleJune 2017
Unified nvTCAM and sTCAM architecture for improving packet matching performance
ACM SIGPLAN Notices (SIGPLAN), Volume 52, Issue 5Pages 91–100https://doi.org/10.1145/3140582.3081034Software-Defined Networking (SDN) allows controlling applications to install fine-grained forwarding policies in the underlying switches. Ternary Content Addressable Memory (TCAM) enables fast lookups in hardware switches with flexible wildcard rule ...
Also Published in:
LCTES 2017: Proceedings of the 18th ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems: ISBN 9781450350303 - articleJune 2017Best Paper
Towards memory-efficient processing-in-memory architecture for convolutional neural networks
Convolutional neural networks (CNNs) are widely adopted in artificial intelligent systems. In contrast to conventional computing centric applications, the computational and memory resources of CNN applications are mixed together in the network weights. ...
Also Published in:
LCTES 2017: Proceedings of the 18th ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems: ISBN 9781450350303 - research-articleApril 2017
SC-DCNN: Highly-Scalable Deep Convolutional Neural Network using Stochastic Computing
ACM SIGPLAN Notices (SIGPLAN), Volume 52, Issue 4Pages 405–418https://doi.org/10.1145/3093336.3037746With the recent advance of wearable devices and Internet of Things (IoTs), it becomes attractive to implement the Deep Convolutional Neural Networks (DCNNs) in embedded and portable systems. Currently, executing the software-based DCNNs requires high-...
Also Published in:
ASPLOS '17: Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems: ISBN 9781450344654 - research-articleApril 2017
Failure-Atomic Slotted Paging for Persistent Memory
ACM SIGPLAN Notices (SIGPLAN), Volume 52, Issue 4Pages 91–104https://doi.org/10.1145/3093336.3037737The slotted-page structure is a database page format commonly used for managing variable-length records. In this work, we develop a novel "failure-atomic slotted page structure" for persistent memory that leverages byte addressability and durability of ...
Also Published in:
ASPLOS '17: Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems: ISBN 9781450344654 - research-articleApril 2017
Exploiting Intra-Request Slack to Improve SSD Performance
ACM SIGPLAN Notices (SIGPLAN), Volume 52, Issue 4Pages 375–388https://doi.org/10.1145/3093336.3037728With Solid State Disks (SSDs) offering high degrees of parallelism, SSD controllers place data and direct requests to exploit the maximum offered hardware parallelism. In the quest to maximize parallelism and utilization, sub-requests of a request that ...
Also Published in:
ASPLOS '17: Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems: ISBN 9781450344654 - research-articleApril 2017
Crossing Guard: Mediating Host-Accelerator Coherence Interactions
ACM SIGPLAN Notices (SIGPLAN), Volume 52, Issue 4Pages 163–176https://doi.org/10.1145/3093336.3037715Specialized hardware accelerators have performance and energy-efficiency advantages over general-purpose processors. To fully realize these benefits and aid programmability, accelerators may share a physical and virtual address space and full cache ...
Also Published in:
ASPLOS '17: Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems: ISBN 9781450344654 - articleJune 2016
Hardware support for protective and collaborative cache sharing
ACM SIGPLAN Notices (SIGPLAN), Volume 51, Issue 11Pages 24–35https://doi.org/10.1145/3241624.2926705Shared caches are generally optimized to maximize the overall throughput, fairness, or both, among multiple competing programs. In shared environments and compute clouds, users are often unrelated to each other. In such circumstances, an overall gain ...
Also Published in:
ISMM 2016: Proceedings of the 2016 ACM SIGPLAN International Symposium on Memory Management: ISBN 9781450343176 - research-articleMarch 2016
Generating Configurable Hardware from Parallel Patterns
- Raghu Prabhakar,
- David Koeplinger,
- Kevin J. Brown,
- HyoukJoong Lee,
- Christopher De Sa,
- Christos Kozyrakis,
- Kunle Olukotun
ACM SIGPLAN Notices (SIGPLAN), Volume 51, Issue 4Pages 651–665https://doi.org/10.1145/2954679.2872415In recent years the computing landscape has seen an increasing shift towards specialized accelerators. Field programmable gate arrays (FPGAs) are particularly promising for the implementation of these accelerators, as they offer significant performance ...
Also Published in:
ASPLOS '16: Proceedings of the Twenty-First International Conference on Architectural Support for Programming Languages and Operating Systems: ISBN 9781450340915 - research-articleMarch 2016
NVWAL: Exploiting NVRAM in Write-Ahead Logging
ACM SIGPLAN Notices (SIGPLAN), Volume 51, Issue 4Pages 385–398https://doi.org/10.1145/2954679.2872392Emerging byte-addressable non-volatile memory is considered an alternative storage device for database logs that require persistency and high performance. In this work, we develop NVWAL (NVRAM Write-Ahead Logging) for SQLite. The contribution of NVWAL ...
Also Published in:
ASPLOS '16: Proceedings of the Twenty-First International Conference on Architectural Support for Programming Languages and Operating Systems: ISBN 9781450340915 - research-articleMarch 2016
ANVIL: Software-Based Protection Against Next-Generation Rowhammer Attacks
- Zelalem Birhanu Aweke,
- Salessawi Ferede Yitbarek,
- Rui Qiao,
- Reetuparna Das,
- Matthew Hicks,
- Yossi Oren,
- Todd Austin
ACM SIGPLAN Notices (SIGPLAN), Volume 51, Issue 4Pages 743–755https://doi.org/10.1145/2954679.2872390Ensuring the integrity and security of the memory system is critical. Recent studies have shown serious security concerns due to "rowhammer" attacks, where repeated accesses to a row of memory cause bit flips in adjacent rows. Recent work by Google's ...
Also Published in:
ASPLOS '16: Proceedings of the Twenty-First International Conference on Architectural Support for Programming Languages and Operating Systems: ISBN 9781450340915 - research-articleMarch 2016
Baymax: QoS Awareness and Increased Utilization for Non-Preemptive Accelerators in Warehouse Scale Computers
ACM SIGPLAN Notices (SIGPLAN), Volume 51, Issue 4Pages 681–696https://doi.org/10.1145/2954679.2872368Modern warehouse-scale computers (WSCs) are being outfitted with accelerators to provide the significant compute required by emerging intelligent personal assistant (IPA) workloads such as voice recognition, image classification, and natural language ...
Also Published in:
ASPLOS '16: Proceedings of the Twenty-First International Conference on Architectural Support for Programming Languages and Operating Systems: ISBN 9781450340915