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- research-articleJune 2024
Ultra-Area-Efficient Cryogenic XNOR Logic Gate with Superconducting Heater Cryotron to Advance High-Performance Computing
GLSVLSI '24: Proceedings of the Great Lakes Symposium on VLSI 2024Pages 651–656https://doi.org/10.1145/3649476.3660375Superconducting electronics have garnered significant attention recently due to their exceptional speed and energy efficiency. They play a vital role in scaling quantum computers to thousands of qubits and offer unique advantages for high-performance ...
- research-articleJune 2024
Processing-in-Memory Designs Based on Emerging Technology for Efficient Machine Learning Acceleration
GLSVLSI '24: Proceedings of the Great Lakes Symposium on VLSI 2024Pages 614–619https://doi.org/10.1145/3649476.3660367The unprecedented success of artificial intelligence (AI) enriches machine learning (ML)-based applications. The availability of big data and compute-intensive algorithms empowers versatility and high accuracy in ML approaches. However, the data ...
- research-articleJune 2024
Event-Driven Sensing and Embedded Neuromorphic Platforms for Gamma Radiation Monitoring
GLSVLSI '24: Proceedings of the Great Lakes Symposium on VLSI 2024Pages 779–784https://doi.org/10.1145/3649476.3660363This work will present an embedded neuromorphic platform developed for long-term unintended gamma radiation monitoring. We describe the hardware architecture and supporting software developed to demonstrate neuromorphic computing for applications where ...
- research-articleJune 2024
Co-DTC: Concentric Trench-Based Integrated Capacitors for Advanced Chiplet-Based Platforms
GLSVLSI '24: Proceedings of the Great Lakes Symposium on VLSI 2024Pages 1–6https://doi.org/10.1145/3649476.3658726Integrated power delivery methodology is a promising approach to achieve high power efficiency as the semiconductor industry targets higher power density and increased heterogeneity across different load characteristics. High quality and densely ...
- research-articleJune 2024
CASH: Criticality-Aware Split Hybrid L1 Data Cache
GLSVLSI '24: Proceedings of the Great Lakes Symposium on VLSI 2024Pages 50–56https://doi.org/10.1145/3649476.3658716Computer architects continue to explore newer ways to provide the abstraction of a large but fast memory to the processor. This work proposes a memory system that achieves this abstraction using a hybrid cache – a combination of an SRAM array and a Spin-...