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- ArticleMay 2000
Solving Problems on Parallel Computers by Cellular Programming
IPDPS '00: Proceedings of the 15 IPDPS 2000 Workshops on Parallel and Distributed ProcessingPages 595–603Cellular automata can be used to design high-performance natural solvers on parallel computers. This paper describes the development of applications using CARPET, a high-level programming language based on the biology-inspired cellular automata theory. ...
- ArticleMay 2000
Fault-Tolerant Distributed-Shared-Memory on a Broadcast-Based Interconnection Network
IPDPS '00: Proceedings of the 15 IPDPS 2000 Workshops on Parallel and Distributed ProcessingPages 1286–1290The Simultaneous Optical Multiprocessor Exchange Bus (SOME-Bus) is a low-latency, high-bandwidth interconnection network which directly links arbitrary pairs of processor nodes without contention, and can efficiently interconnect over one hundred nodes. ...
- ArticleMay 2000
Three Dimensional VLSI-Scale Interconnects
IPDPS '00: Proceedings of the 15 IPDPS 2000 Workshops on Parallel and Distributed ProcessingPages 1092–1103As processor speeds rapidly approach the Giga-Hertz regime, the disparity between process time and memory access time plays an increasing role in the overall limitation of processor performance. In addition, limitations in interconnect density and ...
- ArticleMay 2000
Pulse-Modulated Vision Chips with Versatile-Interconnected Pixels
IPDPS '00: Proceedings of the 15 IPDPS 2000 Workshops on Parallel and Distributed ProcessingPages 1063–1071This paper proposes and demonstrates novel types of vision chips that utilize pulse trains for image processing. Two types of chips were designed using 1.2 m double-metal double-poly CMOS process; one is based on a pulse width modulation (PWM) and the ...
- ArticleMay 2000
Present and Future Needs of Free-Space Optical Interconnects
IPDPS '00: Proceedings of the 15 IPDPS 2000 Workshops on Parallel and Distributed ProcessingPages 1104–1109Over the last decade significant progress in optoelectronic devices and their integration techniques have made Free-Space Optical Interconnects (FSOI) one of the few physical approaches that can potentially address the increasingly complex communication ...
- ArticleMay 2000
Controlling Distributed Shared Memory Consistency from High Level Programming Languages
IPDPS '00: Proceedings of the 15 IPDPS 2000 Workshops on Parallel and Distributed ProcessingPages 293–300One of the keys for the success of parallel processing is the availability of high-level programming languages for on-the-shelf parallel architectures. Using explicit message passing models allows efficient executions. However, direct programming on ...
- ArticleMay 2000
VCSEL Based Smart Pixel Array Technology Enables Chip-to-Chip Optical Interconnect
IPDPS '00: Proceedings of the 15 IPDPS 2000 Workshops on Parallel and Distributed ProcessingPage 1133This paper describes most recent development and demonstration of a VCSEL-based smart pixel array (SPA) technology for chip-to-chip interconnect. This technology is based on Honeywell's commercial successful 850nm VCSEL components, incorporates both ...