Recent research has shown that programs often exhibitvalue locality. Such locality occurs when a code segment,although executed repeatedly in the program, takes only asmall number of different values as input and, naturally,generates a small number of ...

Static Single Assignment form is an intermediate representationthat usesinstructions to merge values ateach confluent point of the control flow graph. instructionsare not machine instructions and must be renamedback to move instructions when translating ...

Memory profiling is the process of characterizing a program's memorybehavior by observing and recording its response to specific inputsets. Relevant aspects of the program's memory behavior maythen be used to guide memory optimizations in an ...

This paper describes LLVM (Low Level Virtual Machine),a compiler framework designed to support transparent, lifelongprogram analysis and transformation for arbitrary programs,by providing high-level information to compilertransformations at compile-time,...

To meet the high demand for powerful embedded processors,VLIW architectures are increasingly complex (e.g.,multiple clusters), and moreover, they now run increasinglysophisticated control-intensive applications. As a result, developingarchitecture-...

HP and Intel's Itanium Processor Family (IPF) isconsidered as one of the most challenging processorarchitectures to generate code for.During global instructionscheduling, the compiler must balance the useof strongly interdependent techniques like code ...

Performing analysis across module boundariesfor an entire program is important for exploitingseveral runtime performance opportunities. However,due to scalability problems in existing full-programanalysis frameworks, such performance opportunitiesare ...

Efficient inter-thread value communication is essential for improving performance in Thread-Level Speculation (TLS). Although several mechanisms for improving value communication using hardware support have been proposed, there is relatively little work ...

Ispike is post-link optimizer developed for theIntel®Itanium Processor Family (IPF) processors.TheIPF architecture poses both opportunities and challenges topost-link optimizations.IPF offers a rich set of performancecounters to collect detailed profile ...

Dynamic optimization systems store optimized or translatedcode in a software-managed code cache in order tomaximize reuse of transformed code. Code caches storesuperblocks that are not fixed in size, may contain linksto other superblocks, and carry a ...

Empirical search is a strategy used during the installation oflibrary generators such as ATLAS, FFTW, and SPIRAL to identify the algorithm or the version of an algorithm that delivers thebest performance. In the past, empirical search has been ...

Dynamic binary translators use a two-phase approachto identify and optimize frequently executed codedynamically. In the first step (profiling phase), blocks ofcode are interpreted or quickly translated to collectexecution frequency information for the ...

In this paper, we present a technique for reducing theoverhead of collecting path profiles in the context of a dynamicoptimizer. The key idea to our approach, called TargetedPath Profiling (TPP), is to use an edge profile to simplifythe collection of a ...

Since their introduction, path profiles have been used toguide the application of aggressive code optimizations andperforming instruction scheduling. However, for optimizationand scheduling, it is often desirable to obtain frequencycounts of paths that ...

Traditionally, software pipelining is applied either to theinnermost loop of a given loop nest or from the innermostloop to the outer loops. In a companion paper, we proposeda scheduling method, called Single-dimension SoftwarePipelining (SSP), to ...

We study several major characteristics of dynamic optimizationwithin the PARROT power-aware, trace-cache-basedmicroarchitectural framework. We investigate thebenefit of providing optimizations which although tightlycoupled with the microarchitecture in ...