Abstract
The Æthereal protocol enables both guaranteed and best effort communication in an on-chip packet switching network. We discuss a formal specification of Æthereal and its underlying network in terms of the PVS specification language. Using PVS we prove absence of deadlock for an abstract version of our model.
Supported by PROGRESS project TES4199, Verification of Hard and Softly Timed Systems (HaaST).
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Gebremichael, B., Vaandrager, F., Zhang, M., Goossens, K., Rijpkema, E., Rădulescu, A. (2005). Deadlock Prevention in the Æthereal Protocol. In: Borrione, D., Paul, W. (eds) Correct Hardware Design and Verification Methods. CHARME 2005. Lecture Notes in Computer Science, vol 3725. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11560548_28
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DOI: https://doi.org/10.1007/11560548_28
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-29105-3
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