Abstract
Memories are known to be the energy bottleneck of portable embedded devices. Numerous memory aware energy optimizations have been proposed. However, both the optimization and the validation are performed in an ad-hoc manner as a coherent optimizing compilation and simulation framework does not exist as yet. In this paper, we present such a framework for performing memory hierarchy aware energy optimization. Both the compiler and the simulator are configured from a single memory hierarchy description. Significant savings of up to 50% in the total energy dissipation are reported.
This work has been partially supported by the European ARTIST Network of Excellence and the German Research Foundation (DFG).
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
Similar content being viewed by others
References
Wulf, W.A., McKee, S.A.: Hitting the Memory Wall: Implications of the Obvious. IEEE Computer Architecture News 23 (1995)
Francesco, P., Marchal, P., Atienza, D., Benini, L., Catthoor, F., Mendias, M.: An Integrated Hardware/Software Approach for Run-Time Scratchpad Management. In: Proc. of DAC, San Deigo (2004)
ICD: Informatik Centrum Dortmund e.V.: ICD-C Compiler Development Framework, http://www.icd.de/es/icd-c/icd-c.html
ICD: Informatik Centrum Dortmund e.V.: LANCE Retargetable C Compiler, http://www.icd.de/es
Steinke, S., Wehmeyer, L., Lee, B.S., Marwedel, P.: Assigning program and data objects to scratchpad for energy reduction. In: Proc. of DATE, Paris, France (2002)
Verma, M., Wehmeyer, L., Marwedel, P.: Dynamic Overlay of Scratchpad Memory for Energy Minimization. In: Proc. of CODES+ISSS, Stockholm, Sweden (2004)
Verma, M., Steinke, S., Marwedel, P.: Data Partitioning for Maximal Scratchpad Usage. In: Proc. of ASPDAC (2003)
Wehmeyer, L., Helmig, U., Marwedel, P.: Compiler-optimized Usage of Partitioned Memories. In: Proceedings of the 3rd Workshop on Memory Performance Issues (WMPI2004). ACM International Conference Prodeedings Series, pp. 114–120 (2004), ISBN: 1-59593-040
Verma, M., Wehmeyer, L., Marwedel, P.: Cache-aware Scratchpad Allocation Algorihm. In: Proc. of DATE, Paris, France (2004)
Wehmeyer, L.: Fast, Efficient and Predictable Memory Accesses – Optimization algorithms for memory architecture aware compilation. Ph.D.-thesis (unpublished, 2005)
ATMEL: Atmel Corporation, http://www.atmel.com
Steinke, S., Knauer, M., Wehmeyer, L., Marwedel, P.: An Accurate and Fine Grain Instruction-Level Energy Model Supporting Software Optimizations. In: Proc. of PATMOS, Yverdon-Les-Bains, Switzerland (2001)
Department of Computer Science XII, University of Dortmund: MACC: Memory Aware C Compilation Framework, http://ls12.cs.uni-dortmund.de/research/macc/
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2006 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Verma, M., Wehmeyer, L., Pyka, R., Marwedel, P., Benini, L. (2006). Compilation and Simulation Tool Chain for Memory Aware Energy Optimizations . In: Vassiliadis, S., Wong, S., Hämäläinen, T.D. (eds) Embedded Computer Systems: Architectures, Modeling, and Simulation. SAMOS 2006. Lecture Notes in Computer Science, vol 4017. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11796435_29
Download citation
DOI: https://doi.org/10.1007/11796435_29
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-36410-8
Online ISBN: 978-3-540-36411-5
eBook Packages: Computer ScienceComputer Science (R0)