Abstract
We present in this paper a graph-narrowing abstract machine which has been designed to support a sequential eager implementation of a functional logic language. Our approach has been to extend a purely functional, (programmed) graph reduction machine by mechanisms capable of performing unification and backtracking. We describe the structure of the machine and explain the compilation scheme which generates machine code from a given source program. Both the machine and the compilation scheme have been formally specified. A prototype emulator of the machine has been implemented in Occam on a transputer system. Future work is planned for incorporating lazy evaluation and parallelism to the machine.
This work has been partially supported by a german-spanish cooperation action, funded by the german D.A.A.D. and the spanish M.E.C
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Kuchen, H., Loogen, R., Moreno-Navarro, J.J., Rodríguez-Artalejo, M. (1990). Graph-based implementation of a functional logic language. In: Jones, N. (eds) ESOP '90. ESOP 1990. Lecture Notes in Computer Science, vol 432. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-52592-0_69
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