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Serial binary addition with polynormally bounded weights

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Artificial Neural Networks — ICANN 96 (ICANN 1996)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1112))

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Abstract

This paper presents a new approach to the problem of serial binary addition with feed-forward neural networks. It is shown that the serial binary addition, an important component to a number of applications such signal processing, of two n-bit operands with carry can be done by a feed-forward linear threshold gate based network with polynomially bounded weights, i.e. in the order of O(n k), associated with small delay and size. In particular, it is shown that the overall delay for the serial addition is k log n + n/k log n serial cycles, with the serial cycle comprising a neuron and a latch. The implementation cost of the proposal is in the order of O(log n), in terms of linear threshold gates, and in the order of O(log2 n), in terms of latches. The fan-in is in the order of O(log n).

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Christoph von der Malsburg Werner von Seelen Jan C. Vorbrüggen Bernhard Sendhoff

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© 1996 Springer-Verlag Berlin Heidelberg

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Cotofana, S., Vassiliadis, S. (1996). Serial binary addition with polynormally bounded weights. In: von der Malsburg, C., von Seelen, W., Vorbrüggen, J.C., Sendhoff, B. (eds) Artificial Neural Networks — ICANN 96. ICANN 1996. Lecture Notes in Computer Science, vol 1112. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-61510-5_125

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  • DOI: https://doi.org/10.1007/3-540-61510-5_125

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-61510-1

  • Online ISBN: 978-3-540-68684-2

  • eBook Packages: Springer Book Archive

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