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Cache-Oblivious Model

1999; Frigo, Leiserson, Prokop, Ramachandran

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Encyclopedia of Algorithms

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Model Definition

The memory system of contemporary computers consists of a hierarchy of memory levels, with each level acting as a cache for the next; a typical hierarchy may consist of registers, level 1 cache, level 2 cache, level 3 cache, main memory, and disk (Fig. 1). One characteristic of the hierarchy is that the memory levels get larger and slower the further they get from the processor, with the access time increasing most dramatically between RAM memory and disk. Another characteristic is that data is moved between levels in blocks.     

Figure 1
figure 1

The memory hierarchy

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Authors and Affiliations

  1. Department of Mathematics and Computer Science, University of Southern Denmark, Odense, Denmark

    Rolf Fagerberg

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  1. Rolf Fagerberg
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Editors and Affiliations

  1. Department of Electrical Engineering and Computer ScienceMcCormick School of Engineering and Applied Science, Northwestern University, Evanston, IL, 60208, USA

    Ming-Yang Kao Professor of Computer Science

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© 2008 Springer-Verlag

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Fagerberg, R. (2008). Cache-Oblivious Model. In: Kao, MY. (eds) Encyclopedia of Algorithms. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-30162-4_62

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