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Table of contents (9 chapters)
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Bibliographic Information
Book Title: Architecture-Independent Loop Parallelisation
Authors: R. C. Calinescu
Series Title: Distinguished Dissertations
DOI: https://doi.org/10.1007/978-1-4471-0763-7
Publisher: Springer London
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eBook Packages: Springer Book Archive
Copyright Information: Springer-Verlag London limited 2000
Softcover ISBN: 978-1-4471-1197-9Published: 16 September 2011
eBook ISBN: 978-1-4471-0763-7Published: 06 December 2012
Edition Number: 1
Number of Pages: XVIII, 172
Topics: Processor Architectures, Special Purpose and Application-Based Systems, Programming Techniques