Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                
Skip to main content

Secure Outsourcing of Cryptographic Circuits Manufacturing

  • Conference paper
  • First Online:
Provable Security (ProvSec 2018)

Part of the book series: Lecture Notes in Computer Science ((LNSC,volume 11192))

Included in the following conference series:

Abstract

The fabrication process of integrated circuits (ICs) is complex and requires the use of off-shore foundries to lower the costs and to have access to leading-edge manufacturing facilities. Such an outsourcing trend leaves the possibility of inserting malicious circuitry (a.k.a. hardware Trojans) during the fabrication process, causing serious security concerns. Hardware Trojans are very hard and expensive to detect and can disrupt the entire circuit or covertly leak sensitive information via a subliminal channel.

In this paper, we propose a formal model for assessing the security of ICs whose fabrication has been outsourced to an untrusted off-shore manufacturer. Our model captures that the IC specification and design are trusted but the fabrication facility(ies) may be malicious. Our objective is to investigate security in an ideal sense and follows a simulation based approach that ensures that Trojans cannot release any sensitive information to the outside. It follows that the Trojans’ impact in the overall IC operation, in case they exist, will be negligible up to simulation.

We then establish that such level of security is in fact achievable for the case of a single and of multiple outsourcing facilities. We present two compilers for ICs for the single outsourcing facility case relying on verifiable computation (VC) schemes, and another two compilers for the multiple outsourcing facilities case, one relying on multi-server VC schemes, and the other relying on secure multiparty computation (MPC) protocols with certain suitable properties that are attainable by existing schemes.

A. Kiayias and Y. Tselekounis—Research partly supported by Horizon 2020 project PANORAMIX, No. 653497.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Subscribe and save

Springer+ Basic
$34.99 /Month
  • Get 10 units per month
  • Download Article/Chapter or eBook
  • 1 Unit = 1 Article or 1 Chapter
  • Cancel anytime
Subscribe now

Buy Now

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 39.99
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 54.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Similar content being viewed by others

References

  1. Ananth, P., Chandran, N., Goyal, V., Kanukurthi, B., Ostrovsky, R.: Achieving privacy in verifiable computation with multiple servers – without FHE and without pre-processing. In: Krawczyk, H. (ed.) PKC 2014. LNCS, vol. 8383, pp. 149–166. Springer, Heidelberg (2014). https://doi.org/10.1007/978-3-642-54631-0_9

    Chapter  Google Scholar 

  2. Ateniese, G., Kiayias, A., Magri, B., Tselekounis, Y., Venturi, D.: Secure outsourcing of circuit manufacturing. Cryptology ePrint Archive, Report 2016/527 (2016). https://eprint.iacr.org/2016/527

  3. Ateniese, G., Magri, B., Venturi, D.: Subversion-resilient signature schemes. In: ACM CCS, pp. 364–375 (2015)

    Google Scholar 

  4. Babai, L., Fortnow, L., Levin, L.A., Szegedy, M.: Checking computations in polylogarithmic time. In: ACM STOC, pp. 21–31 (1991)

    Google Scholar 

  5. Baum, C., Damgård, I., Toft, T., Zakarias, R.: Better preprocessing for secure multiparty computation. In: Manulis, M., Sadeghi, A.-R., Schneider, S. (eds.) ACNS 2016. LNCS, vol. 9696, pp. 327–345. Springer, Cham (2016). https://doi.org/10.1007/978-3-319-39555-5_18

    Chapter  Google Scholar 

  6. Beaumont, M., Hopkins, B., Newby, T.: Hardware Trojans—Prevention, detection, countermeasures (a literature review). Technical report. Australian Government Department of Defence, July 2011

    Google Scholar 

  7. Becker, G.T., Regazzoni, F., Paar, C., Burleson, W.P.: Stealthy dopant-level hardware Trojans: extended version. J. Cryptogr. Eng. 4(1), 19–31 (2014)

    Article  Google Scholar 

  8. Bellare, M., Paterson, K.G., Rogaway, P.: Security of symmetric encryption against mass surveillance. In: Garay, J.A., Gennaro, R. (eds.) CRYPTO 2014. LNCS, vol. 8616, pp. 1–19. Springer, Heidelberg (2014). https://doi.org/10.1007/978-3-662-44371-2_1

    Chapter  Google Scholar 

  9. Bhasin, S., Regazzoni, F.: A survey on hardware Trojan detection techniques. In: IEEE ISCAS, pp. 2021–2024 (2015)

    Google Scholar 

  10. Costello, C., et al.: Geppetto: Versatile verifiable computation. In: IEEE Symposium on Security and Privacy, pp. 253–270 (2015)

    Google Scholar 

  11. Dachman-Soled, D., Kalai, Y.T.: Securing circuits and protocols against 1/poly(k) tampering rate. In: Lindell, Y. (ed.) TCC 2014. LNCS, vol. 8349, pp. 540–565. Springer, Heidelberg (2014). https://doi.org/10.1007/978-3-642-54242-8_23

    Chapter  Google Scholar 

  12. Damgård, I., Ishai, Y.: Constant-round multiparty computation using a black-box pseudorandom generator. In: Shoup, V. (ed.) CRYPTO 2005. LNCS, vol. 3621, pp. 378–394. Springer, Heidelberg (2005). https://doi.org/10.1007/11535218_23

    Chapter  Google Scholar 

  13. Damgård, I., Pastro, V., Smart, N., Zakarias, S.: Multiparty computation from somewhat homomorphic encryption. In: Safavi-Naini, R., Canetti, R. (eds.) CRYPTO 2012. LNCS, vol. 7417, pp. 643–662. Springer, Heidelberg (2012). https://doi.org/10.1007/978-3-642-32009-5_38

    Chapter  Google Scholar 

  14. Dziembowski, S., Faust, S., Standaert, F.-X.: Private circuits III: hardware Trojan-Resilience via testing amplification. In: ACM CCS, pp. 142–153 (2016)

    Google Scholar 

  15. Fiore, D., Gennaro, R., Pastro, V.: Efficiently verifiable computation on encrypted data. In: ACM CCS, pp. 844–855 (2014)

    Google Scholar 

  16. Gennaro, R., Gentry, C., Parno, B.: Non-interactive verifiable computing: outsourcing computation to untrusted workers. In: Rabin, T. (ed.) CRYPTO 2010. LNCS, vol. 6223, pp. 465–482. Springer, Heidelberg (2010). https://doi.org/10.1007/978-3-642-14623-7_25

    Chapter  Google Scholar 

  17. Goldreich, O., Micali, S., Wigderson, A.: How to play any mental game or a completeness theorem for protocols with honest majority. In: ACM STOC, pp. 218–229 (1987)

    Google Scholar 

  18. Greenwald, G.: No Place to Hide: Edward Snowden, the NSA, and the U.S. Surveillance State. Metropolitan Books, New York (2014)

    Google Scholar 

  19. Hamburg, M., Kocher, P., Marson, M.: Analysis of Intel’s Ivy Bridge digital random number generator. Technical report. Cryptography Research Inc., March 2012

    Google Scholar 

  20. Imeson, F., Emtenan, A., Garg, S., Tripunitara, M.V.: Securing computer hardware using 3D integrated circuit (IC) technology and split manufacturing for obfuscation. In: USENIX Security Symposium, pp. 495–510 (2013)

    Google Scholar 

  21. Ishai, Y., Ostrovsky, R., Zikas, V.: Secure multi-party computation with identifiable abort. In: Garay, J.A., Gennaro, R. (eds.) CRYPTO 2014. LNCS, vol. 8617, pp. 369–386. Springer, Heidelberg (2014). https://doi.org/10.1007/978-3-662-44381-1_21

    Chapter  Google Scholar 

  22. Ishai, Y., Prabhakaran, M., Sahai, A., Wagner, D.: Private circuits II: keeping secrets in tamperable circuits. In: Vaudenay, S. (ed.) EUROCRYPT 2006. LNCS, vol. 4004, pp. 308–327. Springer, Heidelberg (2006). https://doi.org/10.1007/11761679_19

    Chapter  MATH  Google Scholar 

  23. Kiayias, A., Tselekounis, Y.: Tamper resilient circuits: the adversary at the gates. In: Sako, K., Sarkar, P. (eds.) ASIACRYPT 2013. LNCS, vol. 8270, pp. 161–180. Springer, Heidelberg (2013). https://doi.org/10.1007/978-3-642-42045-0_9

    Chapter  Google Scholar 

  24. Love, E., Jin, Y., Makris, Y.: Enhancing security via provably trustworthy hardware intellectual property. In: IEEE HOST, pp. 12–17 (2011)

    Google Scholar 

  25. Mak, M.A.: Trusted defense microelectronics: future access and capabilities are uncertain. Technical report. United States Government Accountability Office, October 2015

    Google Scholar 

  26. Mavroudis, V., Cerulli, A., Svenda, P., Cvrcek, D., Klinec, D., Danezis, G.: A touch of evil: high-assurance cryptographic hardware from untrusted components. In: ACM CCS, pp. 1583–1600 (2017)

    Google Scholar 

  27. McIntyre, D.R., Wolff, F.G., Papachristou, C.A., Bhunia, S.: Dynamic evaluation of hardware trust. In: IEEE HOST, pp. 108–111 (2009)

    Google Scholar 

  28. Otto, M.: Fault attacks and countermeasures. Ph.D. thesis. University of Paderborn, Germany (2006)

    Google Scholar 

  29. Parno, B., Howell, J., Gentry, C., Raykova, M.: Pinocchio: nearly practical verifiable computation. In: IEEE Symposium on Security and Privacy, pp. 238–252 (2013)

    Google Scholar 

  30. Potkonjak, M.: Synthesis of trustable ICs using untrusted CAD tools. In: DAC, pp. 633–634 (2010)

    Google Scholar 

  31. Seifert, J.-P., Bayer, C.: Trojan-resilient circuits, Chap. 14. In: Pathan, A.-S.K. (ed.) Securing Cyber-Physical Systems, pp. 349–370. CRC Press, Boca Raton, London, New York (2015)

    Chapter  Google Scholar 

  32. Sharkey, B.: Trust in integrated circuits program. Technical report. DARPA, March 2007

    Google Scholar 

  33. Wahby, R.S., Howald, M., Garg, S.J., Shelat, A., Walfish, M.: Verifiable ASICs. In: IEEE S&P, pp. 759–778 (2016)

    Google Scholar 

  34. Waksman, A., Sethumadhavan, S.: Silencing hardware backdoors. In: IEEE Symposium on Security and Privacy, pp. 49–63 (2011)

    Google Scholar 

  35. Walfish, M., Blumberg, A.J.: Verifying computations without reexecuting them. Commun. ACM 58(2), 74–84 (2015)

    Article  Google Scholar 

  36. Wang, X., Ranellucci, S., Katz, J.: Global-scale secure multiparty computation. In: ACM CCS (2017)

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Bernardo Magri .

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2018 Springer Nature Switzerland AG

About this paper

Check for updates. Verify currency and authenticity via CrossMark

Cite this paper

Ateniese, G., Kiayias, A., Magri, B., Tselekounis, Y., Venturi, D. (2018). Secure Outsourcing of Cryptographic Circuits Manufacturing. In: Baek, J., Susilo, W., Kim, J. (eds) Provable Security. ProvSec 2018. Lecture Notes in Computer Science(), vol 11192. Springer, Cham. https://doi.org/10.1007/978-3-030-01446-9_5

Download citation

  • DOI: https://doi.org/10.1007/978-3-030-01446-9_5

  • Published:

  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-030-01445-2

  • Online ISBN: 978-3-030-01446-9

  • eBook Packages: Computer ScienceComputer Science (R0)

Publish with us

Policies and ethics