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Multilevel Signaling for High-Speed Chiplet-to-Chiplet Communication

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VLSI-SoC: Design Trends (VLSI-SoC 2020)

Part of the book series: IFIP Advances in Information and Communication Technology ((IFIPAICT,volume 621))

Abstract

Increasing memory bandwidth bottleneck, die cost, lower yields at scaled nodes and need for more compact and power efficient devices have led to sustained innovations in integration methodologies. While the semiconductor market has already started witnessing some of these in product forms, many other techniques are currently under investigation in both academia and industry. In this chapter, we explore a 2.5D integrated system where the interconnects are modelled in the form of coplanar microstrip lines. A model is developed to understand the behavior of these wireline structures and is used to study their signaling characteristics. Generally, the conventional NRZ signaling is used to transmit data. As an alternative, we explore a higher order modulation scheme, namely, PAM4. Through the simulation study, we demonstrate that PAM4 can provide up to 63% better energy efficiency and 27% higher bandwidth density than NRZ.

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Authors and Affiliations

  1. Georgia Institute of Technology, Atlanta, GA, 30332, USA

    Rakshith Saligram, Ankit Kaul, Muhannad S. Bakir & Arijit Raychowdhury

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  1. Rakshith Saligram
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  2. Ankit Kaul
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  3. Muhannad S. Bakir
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  4. Arijit Raychowdhury
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Correspondence to Rakshith Saligram .

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Editors and Affiliations

  1. Politecnico di Torino, Turin, Italy

    Andrea Calimera

  2. University of Utah, Salt Lake City, UT, USA

    Pierre-Emmanuel Gaillardon

  3. Technion – Israel Institute of Technology, Haifa, Israel

    Kunal Korgaonkar

  4. Technion – Israel Institute of Technology, Haifa, Israel

    Shahar Kvatinsky

  5. Universidade Federal do Rio Grande do Sul, Porto Alegre, Brazil

    Ricardo Reis

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Saligram, R., Kaul, A., Bakir, M.S., Raychowdhury, A. (2021). Multilevel Signaling for High-Speed Chiplet-to-Chiplet Communication. In: Calimera, A., Gaillardon, PE., Korgaonkar, K., Kvatinsky, S., Reis, R. (eds) VLSI-SoC: Design Trends. VLSI-SoC 2020. IFIP Advances in Information and Communication Technology, vol 621. Springer, Cham. https://doi.org/10.1007/978-3-030-81641-4_8

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  • DOI: https://doi.org/10.1007/978-3-030-81641-4_8

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