Abstract
Modelling and verification of multi-threaded programs are difficult since one must consider all the ways that instructions in different threads can be interleaved. Modern hardware architectures and mainstream programming languages employ relaxed memory models for efficiency purposes, and the additional interleavings from them make the modelling and verification more complex. Total Store Order (TSO) is a widely used relaxed memory model in SPARC implementations and x86 architecture. In this paper, we are committed to proposing a lightweight method for formally modelling and verifying programs under the TSO memory model. Above all, we apply Unifying Theories of Programming (UTP) to investigate a set of algebraic laws, which can dynamically generate configuration sequences of programs under TSO. At the meantime, the information of each configuration is recorded. During this process, we define three properties (including Write-Read Reordering, Read-after-Write Elimination and Barrier) related to the unique features of TSO, and check whether the properties are satisfied. The algebraic laws are implemented in the rewriting engine Maude, and the verification is also conducted in Maude. The verification results show that the properties are all in line with our expectations.
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Abdulla, P.A., Aronis, S., Atig, M.F., Jonsson, B., Leonardsson, C., Sagonas, K.: Stateless model checking for TSO and PSO. Acta Informatica 54, 789–818 (2017). https://doi.org/10.1007/s00236-016-0275-0
Clavel, M., et al.: The Maude 2.0 system. In: Nieuwenhuis, R. (ed.) RTA 2003. LNCS, vol. 2706, pp. 76–87. Springer, Heidelberg (2003). https://doi.org/10.1007/3-540-44881-0_7
Hayes, I.J., Jones, C.B., Meinicke, L.A.: Specifying and reasoning about shared-variable concurrency. In: Bowen, J.P., Li, Q., Xu, Q. (eds.) Theories of Programming and Formal Methods. LNCS, vol. 14080, pp. 110–135. Springer, Cham (2023). https://doi.org/10.1007/978-3-031-40436-8_5
Hoare, C.A.R., He, J.: Unifying Theories of Programming. Prentice Hall International Series in Computer Science (1998). http://www.unifyingtheories.org
Jones, C.B.: Development Methods for Computer Programs Including a Notion of Interference. Technical Monograph PRG-25, Programming Research Group, Oxford University Computing Laboratory (1981). https://www.cs.ox.ac.uk/files/9025/PRG-25.pdf
Jones, C.B.: Systematic Software Development using VDM, 2nd edn. Prentice Hall International Series in Computer Science (1990)
Jones, C.B.: The Turing Guide [book review]. Formal Aspects Comput. 29, 1121–1122 (2017). https://doi.org/10.1007/s00165-017-0446-y
Jones, C.B.: Other semantic approaches. In: Understanding Programming Languages, pp. 95–117. Springer, Cham (2020). https://doi.org/10.1007/978-3-030-59257-8_7
Jones, C.B., Misra, J.: Finding effective abstractions. In: Jones, C.B., Misra, J. (eds.) Theories of Programming: The Life and Works of Tony Hoare, chap. 2, pp. 23–40. Association for Computing Machinery (2021). https://doi.org/10.1145/3477355
Kang, J., Hur, C.K., Lahav, O., Vafeiadis, V., Dreyer, D.: A promising semantics for relaxed-memory concurrency. ACM SIGPLAN Not. 52(1), 175–189 (2017). https://doi.org/10.1145/3009837.3009850
Kavanagh, R., Brookes, S.: A denotational semantics for SPARC TSO. Log. Meth. Comput. Sci. 15(2) (2019). https://doi.org/10.23638/LMCS-15(2:10)2019
Lahav, O., Vafeiadis, V.: Explaining relaxed memory models with program transformations. In: Fitzgerald, J., Heitmeyer, C., Gnesi, S., Philippou, A. (eds.) FM 2016. LNCS, vol. 9995, pp. 479–495. Springer, Cham (2016). https://doi.org/10.1007/978-3-319-48989-6_29
Martí-Oliet, N., Meseguer, J.: Rewriting logic as a logical and semantic framework. Electron. Notes Theor. Comput. Sci. 4, 190–225 (1996). https://doi.org/10.1016/S1571-0661(04)00040-4
Martí-Oliet, N., Meseguer, J.: Rewriting logic: roadmap and bibliography. Theoret. Comput. Sci. 285(2), 121–154 (2002). https://doi.org/10.1016/S0304-3975(01)00357-7
Meseguer, J.: Twenty years of rewriting logic. J. Logic Algebraic Program. 81(7–8), 721–781 (2012). https://doi.org/10.1016/j.jlap.2012.06.003
Morris, F.L., Jones, C.B.: An early proof by Alan Turing. IEEE Ann. Hist. Comput. 6(2), 139–143 (1984). https://doi.org/10.1109/MAHC.1984.10017
Owens, S., Sarkar, S., Sewell, P.: A better x86 memory model: x86-TSO. In: Berghofer, S., Nipkow, T., Urban, C., Wenzel, M. (eds.) TPHOLs 2009. LNCS, vol. 5674, pp. 391–407. Springer, Heidelberg (2009). https://doi.org/10.1007/978-3-642-03359-9_27
Saiedian, H., et al.: An invitation to formal methods. Computer 29(4), 16–30 (1996). https://doi.org/10.1109/MC.1996.488298
Sorin, D., Hill, M., Wood, D.: A Primer on Memory Consistency and Cache Coherence. Morgan & Claypool Publishers, San Rafael (2011)
Xiao, L., Zhu, H., Xu, Q.: Trace semantics and algebraic laws for total store order memory model. J. Comput. Sci. Technol. 36(6), 1269–1290 (2021). https://doi.org/10.1007/s11390-021-1616-1
Zhu, H., Qin, S., He, J., Bowen, J.P.: PTSC: probability, time and shared-variable concurrency. Innovations Syst. Softw. Eng. 5, 271–284 (2009). https://doi.org/10.1007/s11334-009-0100-9
Zhu, H., Yang, F., He, J., Bowen, J.P., Sanders, J.W., Qin, S.: Linking operational semantics and algebraic semantics for a probabilistic timed shared-variable language. J. Logic Algebraic Program. 81(1), 2–25 (2012). https://doi.org/10.1016/j.jlap.2011.06.003
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This work was partially supported by the National Natural Science Foundation of China (No. 62032024), the “Digital Silk Road” Shanghai International Joint Lab of Trustworthy Intelligent Software (No. 22510750100), and Shanghai Trusted Industry Internet Software Collaborative Innovation Center.
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Xiao, L., Zhu, H., Bowen, J.P., Chen, S. (2024). Modelling and Verifying Programs Under the Total Store Order Memory Model in an Algebraic Semantics Style. In: Cavalcanti, A., Baxter, J. (eds) The Practice of Formal Methods. Lecture Notes in Computer Science, vol 14781. Springer, Cham. https://doi.org/10.1007/978-3-031-66673-5_11
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