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Trace-Based Post-Silicon Validation for VLSI Circuits

  • Book
  • © 2014

Overview

Authors:
  1. Xiao Liu

    1. University of California, Berkeley, Stanford, USA

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  2. Qiang Xu

    1. The Chinese University of Hong Kong, Shatin, N.T., Hong Kong SAR

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    You can also search for this author in PubMed   Google Scholar

  • Provides a comprehensive summary of state-of-the-art on post-silicon validation
  • Offers automated solutions that are systematic and cost-effective for post-silicon validation, from trace signal selection to trace data transfer
  • Illustrate key concepts and algorithms with real examples
  • Includes supplementary material: sn.pub/extras

Part of the book series: Lecture Notes in Electrical Engineering (LNEE, volume 252)

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About this book

This book first provides a comprehensive coverage of state-of-the-art validation solutions based on real-time signal tracing to guarantee the correctness of VLSI circuits.  The authors discuss several key challenges in post-silicon validation and provide automated solutions that are systematic and cost-effective.  A series of automatic tracing solutions and innovative design for debug (DfD) techniques are described, including techniques for trace signal selection for enhancing visibility of functional errors, a multiplexed signal tracing strategy for improving functional error detection, a tracing solution for debugging electrical errors, an interconnection fabric for increasing data bandwidth and supporting multi-core debug, an interconnection fabric design and optimization technique to increase transfer flexibility and a DfD design and associated tracing solution for improving debug efficiency and expanding tracing window. The solutions presented in this book improve the validation quality of VLSI circuits, and ultimately enable the design and fabrication of reliable electronic devices.

Keywords

Table of contents (9 chapters)

  1. Front Matter

    Pages i-xv
    Download chapter PDF

  2. Introduction

    • Xiao Liu, Qiang Xu
    Pages 1-4

  3. State of the Art on Post-Silicon Validation

    • Xiao Liu, Qiang Xu
    Pages 5-10

  4. Signal Selection for Visibility Enhancement

    • Xiao Liu, Qiang Xu
    Pages 11-30

  5. Multiplexed Tracing for Design Error

    • Xiao Liu, Qiang Xu
    Pages 31-46

  6. Tracing for Electrical Error

    • Xiao Liu, Qiang Xu
    Pages 47-60

  7. Reusing Test Access Mechanisms

    • Xiao Liu, Qiang Xu
    Pages 61-72

  8. Interconnection Fabric for Flexible Tracing

    • Xiao Liu, Qiang Xu
    Pages 73-85

  9. Interconnection Fabric for Systematic Tracing

    • Xiao Liu, Qiang Xu
    Pages 87-99

  10. Conclusion

    • Xiao Liu, Qiang Xu
    Pages 101-102

  11. Back Matter

    Pages 103-108
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Authors and Affiliations

  • University of California, Berkeley, Stanford, USA

    Xiao Liu

  • The Chinese University of Hong Kong, Shatin, N.T., Hong Kong SAR

    Qiang Xu

Bibliographic Information

  • Book Title: Trace-Based Post-Silicon Validation for VLSI Circuits

  • Authors: Xiao Liu, Qiang Xu

  • Series Title: Lecture Notes in Electrical Engineering

  • DOI: https://doi.org/10.1007/978-3-319-00533-1

  • Publisher: Springer Cham

  • eBook Packages: Engineering, Engineering (R0)

  • Copyright Information: Springer International Publishing Switzerland 2014

  • Hardcover ISBN: 978-3-319-00532-4Published: 27 June 2013

  • Softcover ISBN: 978-3-319-37594-6Published: 23 August 2016

  • eBook ISBN: 978-3-319-00533-1Published: 12 June 2013

  • Series ISSN: 1876-1100

  • Series E-ISSN: 1876-1119

  • Edition Number: 1

  • Number of Pages: XV, 108

  • Number of Illustrations: 21 b/w illustrations, 38 illustrations in colour

  • Topics: Circuits and Systems, Processor Architectures, Semiconductors

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