Abstract
Based on the author’s academic and industrial experience, we discuss the smooth relation between model-based design and programming realized by synchronous languages in the embedded systems field. These languages are used to develop high quality embedded software, in particular for safety-critical applications in avionics, railway, etc., subject to the strongest software certification processes in industry. They have also been used for the efficient model-based development of production hardware circuits. One of their main characteristics is their well-defined formal semantics, with is the base of their simulation and compiling processes and is also fundamental for their link to automatic formal verification systems and other tools related to model-based design. We briefly discuss their current limitations and some ideas to lift them.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Similar content being viewed by others
Notes
- 1.
- 2.
- 3.
- 4.
- 5.
- 6.
References
Rodin Users Handbook. http://www3.hhu.de/stups/handbook/rodin/current/html/
Abrial, J.R.: The B-book: Assigning Programs to Meanings. Cambridge University Press, New York (1996)
Abrial, J.R.: Modeling in Event-B: System and Software Engineering. Cambridge University Press, New York (2013)
André, C.: Representation, analysis of reactive behaviors: a synchronous approach. In: Proceedings of CESA 1996, IEEE-SMC, Lille, France (1996)
Arditi, L., Berry, G., Kishinevsky, M.: Late design changes (ECOs) for sequentially optimized Esterel designs. In: Proceedings of Formal Methods in Computer Aided Design, FMCAD 2004, Austin, Texas (2004)
Arditi, L., Berry, G., Kishinevsky, M., Perreaut, M.: Clocking schemes in Esterel. In: Proceedings of Designing Correct Circuits, DCC 2006, Vienna, Austria (2006)
Balarin, F., Chiodo, M., Jurecska, A., Hsieh, H., Lavagno, A.L., Passerone, C., Sangiovanni-Vincentelli, A., Sentovich, E., Suzuki, K., Tabbara, B.: Hardware-Software Co-Design of Embedded Systems: The Polis Approach. Kluwer Academic Press (1997)
Benveniste, A., Bourke, T., Caillaud, B., Pouzet, M.: Non-standard semantics of hybrid systems modelers. J. Comput. Syst. Sci. (JCSS) 78(3), 877–910 (2012). Special issue in honor of Amir Pnueli
Benveniste, A., Caspi, P., Edwards, S., Halbwachs, N., Le Guernic, P., de Simone, R.: The synchronous languages 12 years later. Proc. IEEE 91(1), 64–83 (2003)
Bergerand, J.L., Pilaud, E., Saga,: a software development environment for dependability in automatic control. In: Proceedings of Safecomp 1988. Pergamon Press (1988)
Berry, G.: A hardware implementation of pure Esterel. Sadhana Acad. Proc. Eng. Sci. Indian Acad. Sci. 17(1), 95–130 (1992)
Berry, G.: The foundations of Esterel. In: Proof, Language and Interaction Essays in Honour of Robin Milner. MIT Press (2000)
Berry, G.: The Constructive Semantics of Pure Esterel. Draft book version 3 (without proofs) (2002). http://www-sop.inria.fr/members/Gerard.Berry/Papers/EsterelConstructiveBook.pdf
Berry, G., Benveniste, A.: The synchronous approach to reactive and real-time systems. Another Look Real Time Programm. Proc. IEEE 79, 1270–1282 (1991)
Berry, G., Bouali, A., Fornari, X., Nassor, E., Ledinot, E., de Simone, R.: Esterel: a formal method applied to avionic development. Sci. Comput. Program. 36, 5–25 (2000)
Berry, G., Cosserat, L.: The ESTEREL synchronous programming language and its mathematical semantics. In: Brookes, S.D., Roscoe, A.W., Winskel, G. (eds.) CONCURRENCY 1984. LNCS, vol. 197, pp. 389–448. Springer, Heidelberg (1985). doi:10.1007/3-540-15670-4_19
Berry, G., Gonthier, G.: The Esterel synchronous programming language: design, semantics, implementation. Sci. Comput. Program. 19(2), 87–152 (1992)
Berry, G., Kishinevsky, M., Singh, S.: System level design and verification using a synchronous language. In: Proceedings of International Conference on Integrated Circuit Design, ICCAD 2003, San Jose, USA (2004)
Berry, G., Moisan, S., Rigault, J.-P.: Towards a synchronous and semantically sound high level language for real-time applications. In: IEEE Real Time Systems Symposium, pp. 30–40 (1983). IEEE Catalog 83 CH 1941–4
Berry, G., Serrano, M., Hop, H.: Multitier web orchestration. In: Proceedings of the ICDCIT 2014 Conference, pp. 1–13 (2014)
Bertin, P., Roncin, D., Vuillemin, J.: Programmable active memories: a performance assessment. In: Borriello, G., Ebeling, C. (eds.) Research on Integrated Systems: Proceedings of the 1993 Symposium, pp. 88–102 (1993)
Bertot, Y., Casteran, P.: Interactive Theorem Proving and Program Development- Coq’Art: The Calculus of Inductive Constructions. Springer (2004)
Blanchet, B., Cousot, P., Cousot, R., Feret, J., Mauborgne, L., Miné, A., Monniaux, D., Rival, X.: A static analyzer for large safety-critical software. In: PLDI 2003 ACM SIGPLAN SIGSOFT Conference on Programming Language Design and Implementation, San Diego, California, USA, pp. 196–207 (2003)
Bouali, A.: Xeve: an Esterel verification environment. In: Proceedings of Computer Aided Verification, CAV 1998, Vancouver, Canada (1998)
Bourke, T., Colaço, J.-L., Pagano, B., Pasteur, C., Pouzet, M.: A synchronous-based code generator for explicit hybrid systems languages. In: Franke, B. (ed.) CC 2015. LNCS, vol. 9031, pp. 69–88. Springer, Heidelberg (2015). doi:10.1007/978-3-662-46663-6_4
Boussinot, F., Reactive, C.: An extension of C to program reactive systems. Softw. Pract. Exp. 21(4), 401–428 (1991)
Boussinot, F., de Simone, R.: The Esterel language. Another Look Real Time Programm. Proc. IEEE 79, 1293–1304 (1991)
Bryant, R.E.: Graph-based algorithms for Boolean function manipulation. IEEE Trans. Comput. 35(8), 677–691 (1986)
Colaço, J.-L., Pagano, B., Pouzet, M.: A conservative extension of synchronous data-flow with state machines. In: Proceedings of Emsoft 2005, New Jersey, USA (2005)
Colaço, J.-L., Girault, A., Hamon, G., Pouzet, M.: Towards a higher-order synchronous data-flow language. In :ACM Fourth International Conference on Embedded Software, EMSOFT 2004, Pisa, Italy, September 2004
Cont, A.: A coupled duration-focused architecture for real-time music-to-score alignment. IEEE Trans. Pattern Anal. Mach. Intell. 32, 974–987 (2010)
Echeveste, J., Cont, A., Giavitto, J.-L., Jacquemard, F.: Operational semantics of a domain specific language for real time musician-computer interaction. Discrete Event Dyn. Syst. 23(4), 343–383 (2013)
Edwards, S.: An Esterel compiler for large control-dominated systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2(2), 169–183 (2002)
Espiau, B., Coste-Manière, E.: A synchronous approach for control sequencing in robotics applications, pp. 503–508. In: Proceedings of IEEE International Workshop on Intelligent Motion, Istambul (1990)
De Moura, L., Bjrner, N.: Satisfiability modulo theories: introduction and applications. Comm. ACM 54(9), 69–77 (2011)
Le Guernic, P., Le Borgne, M., Gauthier, T., Le Maire, C.: Programming real time applications with Signal. Another Look Real Time Programm. Proc. IEEE 79, 1270–1282 (1991). Special Issue
Halbwachs, N.: Synchronous Programming of Reactive Systems. Kluwer, Dordrecht (1993)
Halbwachs, N., Caspi, P., Pilaud, D.: The synchronous dataflow programming language Lustre. Another Look Real Time Programm. Proc. IEEE 79, 1270–1282 (1991). Special Issue
Harel, D.: Statecharts: a visual approach to complex systems. Sci. Comput. Program. 8, 231–274 (1987)
Iman, S., Joshi, S.: The e-Hardware Verification Language. Springer, Heidelberg (2004)
Jagadeesan, L., Von Olnhausen, J., Puchol, C.: A formal approach to reactive system software: a telecommunications application in Esterel. J. Formal Methods Syst. Des. 8(2), 132–145 (1996)
Knuth, D.: The Art of Computer Programming, Vol. 4: Combinatorial Algorithms, Section 7.1.4: Binary Decision Diagrams. Addison Wesley, Reading (2014)
Knuth, D.: The Art of Computer Programming, vol. 4B, 7.2.2.2: Satisfiability. Addison Wesley, Reading (2016)
Kroening, D., Strichman, O.: Decision Procedures An Algorithmic Point of View. Springer (2008)
Leroy, X.: Formal verification of a realistic compiler. Commun. ACM 52(7), 107–115 (2009)
Malik, S.: Analysis of cyclic combinational circuits. IEEE Trans. Comput. Aided Des. 13(7), 950–956 (1994)
Mandel, L., Pouzet, M.: ReactiveML, a reactive extension to ML. In: Proceedings of Principles and Practice of Declarative Programming, PPDP 2005, Lisbon (2005)
Maraninchi, F., Rémond, Y.: Mode automata: a new domain-specific construct for the development of safe critical systems. Sci. Comput. Programm. 46(3), 219–254 (2003)
Mendler, M., Shiple, T., Berry, G.: Constructive Boolean circuits and the exactness of timed ternary simulation. Formal Methods Syst. Des. 40(3), 283–329 (2012)
Murakami, G., Sethi, R.: Terminal call processing in Esterel. In: Proceedings of IFIP 92 World Computer Congress, Madrid, Spain (1992)
Potop-Butucaru, D., Edwards, S.A., Berry, G.: Compiling Esterel. Springer, Heidelberg (2007)
Pouzet, M.: Building a hybrid systems modeler on synchronous languages principles. In: Proceedings of ACM International Conference on Embedded Software (EMSOFT), Amsterdam (2015)
Roy, V., de Simone, R.: Auto and autograph. In: Kurshan, R. (ed.) Proceedings of Workshop on Computer Aided Verification, New-Brunswick, June 1990
Schneider, K.: Embedding imperative synchronous languages in interactive theorem provers. In: Proceedings of Conference on Application of Concurrency to System Design (ACSD) (2001)
Sentovich, E., Toma, H., Berry, G.: Latch optimization in circuits generated from high-level descriptions. In: Proceedings of International Conference on Computer-Aided Design (ICCAD) (1996)
Sentovich, E., Toma, H., Berry, G.: Efficient latch optimization using exclusive sets. In: Proceedings of Digital Automation Conference (DAC) (1997)
Serrano, M., Berry, G.: Multitier programming in Hop - a first step toward programming 21st-century applications. Commun. ACM 55(8), 53–59 (2012)
Serrano, M., Prunet, V.: A glimpse of Hopjs. In: 21th Sigplan International Conference on Functional Programming (ICFP), Nara, Japan (2016)
Shiple, T., Berry, G., Touati, H.: Constructive analysis of cyclic circuits. In: Proceedings of International Design and Testing Conf (ITDC), Paris (1996)
Touati, H., Berry, G.: Optimized controller synthesis using Esterel. In: Proceedings of International Workshop on Logic Synthesis IWLS 1993, Lake Tahoe (1993)
von Hanxleden, R., Duderstadt, B., Motika, C., Smyth, S., Mendler, M., Aguado, J., Mercer, S., OBrien, O.: SCCharts: Sequentially constructive statecharts for safety-critical applications. In: Proceedings ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI14), Edinburgh, UK, (2014)
von Hanxleden, R., Mendler, M., Aguado, J., Duderstadt, B., Fuhrmann, I., Motika, C., Mercer, S., O’Brien, O.: Sequentially constructive concurrency - a conservative extension of the synchronous model of computation. In: Proceedings of Design, Automation and Test in Europe Conference, DATE 2013, Grenoble, France (2013)
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2016 Springer International Publishing AG
About this paper
Cite this paper
Berry, G. (2016). Formally Unifying Modeling and Design for Embedded Systems - A Personal View. In: Margaria, T., Steffen, B. (eds) Leveraging Applications of Formal Methods, Verification and Validation: Discussion, Dissemination, Applications. ISoLA 2016. Lecture Notes in Computer Science(), vol 9953. Springer, Cham. https://doi.org/10.1007/978-3-319-47169-3_11
Download citation
DOI: https://doi.org/10.1007/978-3-319-47169-3_11
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-319-47168-6
Online ISBN: 978-3-319-47169-3
eBook Packages: Computer ScienceComputer Science (R0)