Abstract
This paper proposes a framework for software power cost estimation. This framework is conceived to be applied to embedded system design in which energy consumption is the main concern. The processor behavior is modeled in Colored Petri Net (CPN) so that to use CPN analyzing techniques for quantitative parameters. This approach allows to analyze consumption distribution along the program, using widespread CPN tool, as an open and retargetable evaluation environment. Such analysis helps designers to improve total consumption on either way: by software optimization and by software/hardware migration. A taxonomy is proposed in order to support that analysis. The main contribution includes the proposition of a method based on CPN for software power estimation that can be used as internal format for software power analysis tools.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
Similar content being viewed by others
References
Brooks, D., Tiwari, V., Martonosi, M.: Wattch: a framework for architectural-level power analysis and optimizations. In: Proc. of the 27th annual inter. symposium on Computer architecture, pp. 83–94. ACM Press, New York (2000)
Burns, F., Koelmans, A., Yakovlev, A.: Modelling of superscala processor architectures with design/CPN. In: Workshop on Practical Use of Coloured Petri Nets and Design/CPN, Aarhus, Denmark, June 10-12, pp. 15–30. Aarhus University (1998)
Fornaciari, W., Gubian, P., Sciuto, D.: Power estimation of embedded systems: A hardware/ software codesign approach. IEEE Trans. on VLSI Systems, 266–275 (June 1998)
Christensen, S., Kristensen, L., Jensen, K.: The practitioner’s guide to coloured petri nets. International Journal on Software Tools for Technology Transfer: Special section on coloured Petri nets 2(2), 98–132 (1998)
Laopoulos, T., Neofotistos, P., Kosmatopoulos, C., Nikolaidis, S.: Current variations measurements for the estimation of software-related power consumption. In: IEEE Instrumentation and Measurement Technology Conference (May 2002)
Dey, S., Lajolo, M., Raghunathan, A., Lavagno, L.: Cosimulation-based power estimation for syste-on-chip design. IEEE Trans. on Very Large Scale Integration (VLSI) System 10(3), 253–266 (2002)
Tiwari, V., Lee, M., Malik, S., Fujita, M.: Power analysis and minimization techniques for embedded dsp software. In: IEEE Trans. on Very Large Scale Integration Systems, March 1997, pp. 123–135 (1997)
Murata, T.: Petri nets: Properties, analysis and applications. Proc. of the IEEE 77(4), 541–580 (1989)
Kavvadias, N., Nikolaidis, S., Neofotistos, P.: Instruction-level power measurement methodology. Technical report, Electronics Lab., Physics Dept., Aristotle University of Thessaloniki, Greece (March 2002)
Stitt, G., Vahid, F.: Hardware/software partitioning of software binaries. In: Proc. of the 2002 IEEE/ACM inter. conf. on Computer-aided design, pp. 164–170. ACM Press, New York (2002)
Vahid, F., Givargis, T., Henkel, J.: Instruction-based system-level power evaluation of systemon- chip peripheral cores. IEEE Trans. on Very Large Scale Integration Systems 10(6), 856–863 (2002)
Tiwari, V., Malik, S., Wolfe, A.: Power analysis of embedded software: A first step towards software power minimization. IEEE Trans. on Very Large Scale Integration Systems 2(4), 437–445 (1994)
Yeap, G.: Practical Low Power Digital VLSI Design. Kluwer Academic Publishers, Dordrecht (1998)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2004 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Júnior, M.N.O., Maciel, P.R.M., Barreto, R.S., Carvalho, F.F. (2004). Towards a Software Power Cost Analysis Framework Using Colored Petri Net. In: Macii, E., Paliouras, V., Koufopavlou, O. (eds) Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2004. Lecture Notes in Computer Science, vol 3254. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-30205-6_38
Download citation
DOI: https://doi.org/10.1007/978-3-540-30205-6_38
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-23095-3
Online ISBN: 978-3-540-30205-6
eBook Packages: Springer Book Archive