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Implementing Blocked Sparse Matrix-Vector Multiplication on NVIDIA GPUs

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Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS 2009)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 5657))

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Abstract

We discuss implementing blocked sparse matrix-vector multiplication for NVIDIA GPUs. We outline an algorithm and various optimizations, and identify potential future improvements and challenging tasks. In comparison with previously published implementation, our implementation is faster on matrices having many high fill-ratio blocks but slower on matrices with low number of non-zero elements per row.

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References

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© 2009 IFIP International Federation for Information Processing

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Monakov, A., Avetisyan, A. (2009). Implementing Blocked Sparse Matrix-Vector Multiplication on NVIDIA GPUs. In: Bertels, K., Dimopoulos, N., Silvano, C., Wong, S. (eds) Embedded Computer Systems: Architectures, Modeling, and Simulation. SAMOS 2009. Lecture Notes in Computer Science, vol 5657. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-03138-0_32

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  • DOI: https://doi.org/10.1007/978-3-642-03138-0_32

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-03137-3

  • Online ISBN: 978-3-642-03138-0

  • eBook Packages: Computer ScienceComputer Science (R0)

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