Abstract
The 3D devices have been widely applied in people’s life, for example, smart phone, internet games, high-definition video, geography navigation, etc. The large scale graphics rendering depends on the computing power of the hardware greatly, the calculation of model rasterization operations need amounts of data. It has become the bottleneck of system performance. This paper proposed the method which can accelerate graphics rasterization procedure, based on the idea of tile to meet the needs of graphical applications on embedded platform. The rules and procedures of algorithm are introduced. By using of the XUP-LX110T, the experiments are carried out. It is verified that the method should been compensated the features for the lack of resources and poor computing power of embedded platforms. It can apply smaller chip area to achieve graphics acceleration with fewer resources.
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Wang, X., Xiong, W., Feng, X., Yu, S., Jiang, H. (2012). Study on Rasterization Algorithm for Graphics Acceleration System. In: Huang, T., Zeng, Z., Li, C., Leung, C.S. (eds) Neural Information Processing. ICONIP 2012. Lecture Notes in Computer Science, vol 7667. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-34500-5_3
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DOI: https://doi.org/10.1007/978-3-642-34500-5_3
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-34499-2
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