Abstract
In this paper, a PVT compensated, 10 MHz oscillator in 0.11 µm BCD9S (Bipolar CMOS DMOS) technology for embedded phase change memories (PCM) is reported. The proposed oscillator produces a frequency deviation of ±0.4% for typical corner, ±2% for slow corner and ±1.5% for fast corner around 10 MHz across −40 °C to 150 °C at a regulated supply of 1.8 V. It is a significant advancement in the existing state-of-the-art for frequency references.
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Acknowledgements
The authors would like to thanks the Smart-power Technology group at ST Microelectronics, India for providing CAD Tools as well as technical support throughout the work.
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Tyagi, V., Hashmi, M.S., Raj, G., Rana, V. (2017). A 10 MHz, 42 ppm/\( ^{ \circ } {\text{C}} \), 69 μW PVT Compensated Latch Based Oscillator in BCD9S Technology for PCM. In: Kaushik, B., Dasgupta, S., Singh, V. (eds) VLSI Design and Test. VDAT 2017. Communications in Computer and Information Science, vol 711. Springer, Singapore. https://doi.org/10.1007/978-981-10-7470-7_60
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DOI: https://doi.org/10.1007/978-981-10-7470-7_60
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