Abstract
Moment invariants play an important role in pattern recognition and computer vision. They have the nice properties of being invariant under translation, rotation and scaling. In this paper, we propose a new systolic array for computing ordinary moments from which moment invariants can be derived. The array exploits parallelism of the computation maximally and has an ideal time complexity ofO(n). Each computation step involves a single addition only and is thus far superior to most existing solutions that require multiplication. The systolic array can be directly implemented in VLSI and we also provide an estimate of the realizability of the array in a 0.8 micron BiCMOS technology. To achieve effective tradeoff between area and time requirement, we also propose a scalable array that allows us to fold the computation into a much smaller area. Our solution is suitable for both binary images and gray level images and is thus superior to an earlier work that has similar characteristics.
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Chan, F.H.Y., Lam, F.K., Li, H.F. et al. An all adder systolic structure for fast computation of moments. J VLSI Sign Process Syst Sign Image Video Technol 12, 159–175 (1996). https://doi.org/10.1007/BF00924524
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DOI: https://doi.org/10.1007/BF00924524