Abstract
We prove tight upper and lower bounds on the area of semelective, when-oblivious VLSI circuits for the problem ofl-selection. The area required to select thelth smallest ofn k-bit integers is found to be heavily dependent on the relative sizes ofl,k, andn. Whenl<2k, the minimal area isA = Θ(minn,l(k-logl)). Whenl≥2k,A = Θ(2k(logl-k + 1)).
Similar content being viewed by others
References
G. Baudet, On the area required by VLSI circuits, inVLSI Systems and Computations (H. T. Kung, R. Sproull, and G. Steele, eds.), Computer Science Press, 1981, pp. 100–107.
G. Bilardi, The area-time complexity of sorting, ACT-52, Ph.D. Dissertation, Coordinated Science Laboratory, University of Illinois at Urbana-Champaign, 1984.
G. Bilardi, M. Pracchi, and F. P. Preparata, A critique of network speed in VLSI models of computation,IEEE J. Solid-State Circuits,17 (1982), 696–702.
R. Brent and H. T. Kung, The area-time complexity of binary multiplication,J. Assoc. Comput. Mach.,28 (1981), 521–534.
B. Chazelle and L. Monier, A model of computation for VLSI with related complexity results,Proceedings of the 13th Annual ACM Symposium on Theory of Computing, 1981, pp. 318–325.
P. Duriš, O. Sýkora, C. Thompson, and I. Vrto, A lower bound on the area of DFT and DWHT circuits,Inform. Process. Lett.,21 (1985), 245.
P. Ďuriš, O. Sýkora, C. Thompson, and I. Vrto, A minimum-area circuit forl-selection, UCB/CSD 85/244, 1985, 13 pp.
P. Ďuriš, O. Sýkora, C. Thompson, and I. Vrto, Tight chip area bounds for sorting,Comput. Artificial Intel.,4 (1985), 535–544.
R. Kolla, Where oblivious is not sufficient,Inform. Process. Lett.,17 (1983), 263–268.
R. J. Lipton and R. Sedgewick, Lower bounds for VLSI,Proceedings of the 13th Annual ACM Symposium on Theory of Computing, 1981, pp. 300–307.
C. A. Mead and M. Rem, Cost and performance of VLSI computing structures,IEEE J. Solid-State Circuits,14 (1979), 455–462.
A. L. Rosenberg, References to the literature on VLSI algorithmics and related mathematical and practical issues,SIGACT News,16 (1984), 54–64.
J. Savage, Planar circuit complexity and the performance of VLSI algorithms, inVLSI Systems and Computations (H. T. Kung, R. Sproull, G. Steele, eds.), Computer Science Press, 1981, pp. 61–68.
A. Siegel, Tight area bounds and provably goodAT 2 bounds for sorting circuits, Report Number 122, Courant Institute, New York University, 1984, 22 pp.
A. R. Siegel, Minimum storage sorting networks,IEEE Trans. Comput.,34 (1985), 355–361.
C. D. Thompson, The VLSI complexity of sorting,IEEE Trans. Comput.,32 (1983), 1171–1184.
J. Ullman,Computational Aspects of VLSI, Computer Science Press, Rockville, MD, 1984.
I. Vrto, Optimal VLSI algorithms for selecting the maximum element of a set, inParcella 84: Proceedings of the Second International Workshop on Parallel Processing by Cellular Automata and Arrays (Wolfgang Händleret al., eds.), Akademie-Verlag, Berlin, 1985, pp. 232–239.
J. Vuillemin, A combinational limit to the computing power of VLSI circuits,IEEE Trans. Comput.,32 (1983), 294–300.
A. C. Yao, The entropie limits of VLSI computations,Proceedings of the 13th Annual ACM Symposium on Theory of Computing, 1981, pp. 308–311.
Author information
Authors and Affiliations
Additional information
Communicated by Bernard Chazelle.
This work was supported in part by National Science Foundation Grant DMC 84-06408 and by the Slovak Academy of Sciences.
Rights and permissions
About this article
Cite this article
Ďuriš, P., Sýkora, O., Thompson, C.D. et al. A minimum-area circuit forl-selection. Algorithmica 2, 251–265 (1987). https://doi.org/10.1007/BF01840362
Received:
Revised:
Issue Date:
DOI: https://doi.org/10.1007/BF01840362