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PHIDEO: High-level synthesis for high throughput applications

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Abstract

This paper describes a new approach to high-level synthesis for high throughput applications. Such applications are typically found in real-time video systems such as HDTV. The method is capable of dealing with hierarchical flow graphs containing loops with manifest boundaries and linear index expressions. The algorithm is based on the model of periodic operations which allows optimizations across loop boundaries. Processing units and storage units are minimized simultaneously. The algorithm is implemented in thePHIDEO system. The major parts of this system are the processing unit synthesis, the scheduler and the memory synthesis including address generation.

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Authors and Affiliations

  1. Philips Research Laboratories, Eindhoven, The Netherlands

    J. L. Van Meerbergen, P. E. R. Lippens, W. F. J. Verhaegh & A. Van Der Werf

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  1. J. L. Van Meerbergen
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  2. P. E. R. Lippens
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  3. W. F. J. Verhaegh
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  4. A. Van Der Werf
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Van Meerbergen, J.L., Lippens, P.E.R., Verhaegh, W.F.J. et al. PHIDEO: High-level synthesis for high throughput applications. Journal of VLSI Signal Processing 9, 89–104 (1995). https://doi.org/10.1007/BF02406472

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  • DOI: https://doi.org/10.1007/BF02406472

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