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A block algorithm and optimal fixed-size systolic array processor for the algebraic path problem

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Abstract

The solution of the algebraic path problem (APP) for arbitrarily sized graphs by a fixed-size systolic array processor (SAP) is addressed. First, a block algorithm for the APP is obtained. The algorithm is modified to require only two block subproblems or primitives. Two similar SAPS are designed for solving the primitives. Then, the primitive SAPS are integrated into a versatile SAP (VSAP). The proposed VSAP hasp ×p processing elements (PEs), solving the APP of ann-vertex graph inn 3/p 2 +n 2/p + 3p − 2 cycles. With slight modifications in the operations performed by the PEs, the problem is optimally solved inn 3/p 2 + 3p − 2 cycles.

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Author notes

  1. Fernando J. Núñez

    Present address: School of Electrical Engineering, Purdue University, Box 337, 47907, West Lafayette, IN

Authors and Affiliations

  1. Departamento de Arquitectura de Computadores, Facultad de Informática de Barcelona, Universidad Politécnica de Cataluña, Pau Gargallo 5, 08028, Barcelona, Spain

    Fernando J. Núñez & Mateo Valero

Authors
  1. Fernando J. Núñez
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  2. Mateo Valero
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Additional information

This work has been supported by the Ministry of Education and Science of Spain (CAICYT) under contract PA85-0314.

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Núñez, F.J., Valero, M. A block algorithm and optimal fixed-size systolic array processor for the algebraic path problem. J VLSI Sign Process Syst Sign Image Video Technol 1, 153–162 (1989). https://doi.org/10.1007/BF02477180

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  • DOI: https://doi.org/10.1007/BF02477180

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