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A lock-based cache coherence protocol for scope consistency

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Abstract

Directory protocols are widely adopted to maintain cache coherence of distributed shared memory multiprocessors. Although scalable to a certain extent, directory protocols are complex enough to prevent it from being used in very large scale multiprocessors with tens of thousands of nodes. This paper proposes a lock-based cache coherence protocol for scope consistency. It does not rely on directory information to maintain cache coherence. Instead, cache coherence is maintained through requiring the releasing processor of a lock to store all write-notices generated in the associated critical section to the lock and the acquiring processor invalidates or updates its locally cached data copies according to the write notices of the lock. To evaluate the performance of the lock-based cache coherence protocol, a software DSM system named JIAJIA is built on network of workstations. Besides the lock-based cache coherence protocol, JIAJIA also characterizes itself with its shared memory organization scheme which combines the physical memories of multiple workstations to form a large shared space. Performance measurements with SPLASH2 program suite and NAS benchmarks indicate that, compared to recent SVM systems such as CVM, higher speedup is achieved by JIAJIA. Besides, JIAJIA can solve large scale problems that cannot be solved by other SVM systems due to memory size limitation.

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Correspondence to Hu Weiwu.

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The work of this paper is supported by the National Climbing Program ofChina, the National Natural Science Foundation of China, and the President Creation Foundation of Chinese Academy of Sciences.

Hu Weiwu received his B.S. degree from University of Science and Technology of China in 1991 and his Ph.D. degree from the Institute of Computing Technology, the Chinese Academy of Sciences in 1996, both in computer science. He is currently an Associate Professor of the Institute of Computing Technology. His research interests include high performance computer architecture, parallel processing, and VLSI design.

Shi Weisong received his B.S. degree from Xidian University in 1995 and his M.S. degree from the Institute of Computing Technology, the Chinese Academy of Sciences in 1997. He is currently a Ph.D. candidate of the Institute of Computing Technolog. His research interests include high performance computer architecture, parallel processing, and digital signal processing.

Tang Zhimin received his B.S. degree from Nanjing University in 1985 and his Ph.D. degree from the Institute of Computing Technology, the Chinese Academy of Sciences in 1990, both in computer science. He is currently a Professor of the Institute of Computing Technology. His research interests include high performance computer architecture, MPP systems, and digital signal processing.

Li Ming received his B.S. degree from University of Science and Technology of China in 1994 and his M.S. degree from the Institute of Computing Technology, the Chinese Academy of Sciences in 1997, both in computer science. He is currently a graduate student of the University of California at Los Angeles.

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Hu, W., Shi, W., Tang, Z. et al. A lock-based cache coherence protocol for scope consistency. J. of Comput. Sci. & Technol. 13, 97–109 (1998). https://doi.org/10.1007/BF02946599

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