Abstract
Systems can be described at various levels of abstraction: automata, processes and behavior. In this paper, we take the ready trace set as a description of the behavior of a process and we present a ready trace model of real time process algebra. We argue that, especially in the real time case, properties of ready trace sets are best formulated in a dedicated logic (as opposed to describing them in an enriched process notation, such as ACPτ). We present the syntax and semantics of a logic that could serve this purpose and we apply it to study the existence of socalled coordinated attack protocols. A connection is made with the metric temporal logic of Koymans. This paper is an abbreviated version of [BABB93].
This author received partial support from ESPRIT Basic Research Action 7166, CONCUR2.
This author received partial support from ESPRIT Basic Research Action 6454, CONFER.
Preview
Unable to display preview. Download preview PDF.
References
J.C.M. Baeten & J.A. Bergstra, Real time process algebra, Formal Aspects of Computing 3 (2), 1991, pp. 142–188.
J.C.M. Baeten, J.A. Bergstra & R.N. Bol, A real time process logic, report CSN 93/15, Dept. of Computing Science, Eindhoven University of Technology, 1993.
J.C.M. Baeten, J.A. Bergstra & J.W. Klop, Ready trace semantics for concrete process algebra with priority operator, British Computer Journal 30 (6), 1987, pp. 498–506.
J.W. de Barker & J.I. Zucker, Processes and the denotational semantics of concurrency, I&C 54, 1982, pp. 70–120.
J.A. Bergstra & J.W. Klop, Process algebra for synchronous communication, Inf. & Control 60, 1984, pp. 109–137.
J.A. Bergstra & J.W. Klop, A complete inference system for regular processes with silent moves, in: Proc. Logic Coll. 1986, Hull (F.R. Drake & J.K. Truss, eds.), North-Holland 1988, pp. 21–81.
C.H. van Berkel, Handshake circuits: an intermediary between communicating processes and VLSI, Ph.D. Thesis, Eindhoven University of Technology 1992.
S.D. Brookes, C.A.R. Hoare & A.W. Roscoe, A theory of communicating sequential processes, J. ACM 31 (3), 1984, pp. 560–599.
M. Broy, Functional specification of time sensitive communication systems, NATO ASI series, series F: computer and systems sciences, Vol. 88, pp. 325–367.
J.C. Ebergen, Translating programs into delay-insensitive circuits, Tract 56, CWI Amsterdam 1989.
R.J. van Glabbeek, The linear time — branching time spectrum, in: Proc. CONCUR'90, Amsterdam (J.C.M. Baeten & J.W. Klop, eds.), Springer LNCS 458, 1990, pp. 278–297.
J.F. Groote, Personal communication, 1992.
J.Y. Halpern & Y.O. Moses, Knowledge and common knowledge in a distributed environment, J. ACM 37, 1990, pp. 549–587.
M. Hennessy & R. de Nicola, Testing equivalences for processes, TCS 34, 1984, pp. 83–134.
C.A.R. Hoare, Communicating sequential processes, Prentice Hall 1985.
A. Kaldewaij, A formalism for concurrent processes, Ph.D. Thesis, Eindhoven University of Technology 1986.
R.L.C. Koymans, Specifying message passing and time-critical systems with temporal logic, Ph.D. Thesis, Eindhoven University of Technology 1989.
R.L.C. Koymans, Specifying message passing systems requires extending temporal logic, in: Proc. Temporal Logic in Specification (B. Banieqbal, H. Barringer & A. Pnueli, eds.), Springer LNCS 398, 1989, pp. 213–223.
J.-J. Ch. Meyer, Merging regular processes by means of fixed point theory, TCS 45, 1985, pp. 193–260.
E.-R. Olderog, Nets, Terms and Formulas, Cambridge Tracts in Theor. Comp. Sci. 23, Cambridge University Press 1991.
E.-R. Olderog & C.A.R. Hoare, Specification-oriented semantics for communicating processes, in: Proc. ICALP 83 (J. Díaz, ed.), Springer LNCS 154, 1983, pp. 561–572.
J. Parrow, Fairness properties in process algebra — with applications in communication protocol verification, Ph.D. Thesis, Uppsala University 1985.
I.C.C. Philips, Refusal testing, TCS 50, 1987, pp. 241–284.
A. Pnueli, Linear and branching structures in the semantics and logics of reactive systems, in: Proc. ICALP 85 (W. Brauer, ed.), Springer LNCS 194, 1985, pp. 15–32.
R. Reiter, On closed world databases, in: Logic and Databases (H. Gallaire and J. Minker, eds.), Plenum Press, 1978.
G.M. Reed & A.W. Roscoe, A timed model for communicating sequential processes, TCS 58, 1988, pp. 249–261.
M. Rem, Partially ordered computations, with applications to VLSI design, in: Proc. Found. of Comp. Sci. IV.2 (J.W. de Bakker J. van Leeuwen, eds.), MC Tract 159, Math. Centre, Amsterdam 1983, pp. 1–44.
J.L.A. van de Snepscheut, Trace theory and VLSI design, Springer LNCS 200, 1985.
J.T. Udding, Classification and composition of delay-insensitive circuits, Ph.D. Thesis, Eindhoven University of Technology 1986.
E.P. de Vink, Designing stream based semantics for uniform concurrency and logic programming, Ph.D. Thesis, Free University, Amsterdam 1990.
Author information
Authors and Affiliations
Editor information
Rights and permissions
Copyright information
© 1994 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Baeten, J.C.M., Bergstra, J.A., Bol, R.N. (1994). A real time process logic. In: Gabbay, D.M., Ohlbach, H.J. (eds) Temporal Logic. ICTL 1994. Lecture Notes in Computer Science, vol 827. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0013979
Download citation
DOI: https://doi.org/10.1007/BFb0013979
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-58241-0
Online ISBN: 978-3-540-48585-8
eBook Packages: Springer Book Archive