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An experimental study of an ILP-based exact solution method for software pipelining

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Languages and Compilers for Parallel Computing (LCPC 1995)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1033))

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Abstract

Software pipelining has been widely accepted as an efficient technique for scheduling instructions in a loop body for VLIW and Superscalarprocessors. Several software pipelining methods based on heuristic approachs have been proposed in the literature. Mathematical formulations based on integer linear programming (ILP) to obtain rateoptimal schedules are also becoming popular. We term formulations such as ILP exact to indicate that they solve a precisely stated optimality problem. By contrast, we term what are generally called “heuristic” methods inexact since they do not guarantee optimality. We do not use the term heuristic, because various heuristics can also be used to guide approaches such as ILP— without losing any optimality.

In this paper we compare our software pipelining method based on the ILP with three inexact methods. These software pipelining methods are applied to 1008 different loops extracted from a variety of benchmark programs, and their performance, in terms of the computation rate of the loop schedule, the number of registers used, and the execution time of the scheduling method. Compared to the inexact approaches and in terms of computation rate and register requirements, the ILP based scheduling method obtains better schedules in a significant number of test cases. The ILP based method obtained optimal schedules reasonably fast, with a median of less than 3 seconds and a geometric mean of less than 3 seconds. We present a case for the ILP approach and its usefulness in performance critical applications and also as a testbed for evaluating other inexact software pipelining methods.

This work was supported by research grants from NSERC (Canada) and MICRONET -Network Centers of Excellence (Canada).

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References

  1. E.R. Altman. Optimal Software Pipelining with Function Unit and Register Constraints (In Preparation). PhD thesis, McGill University, Montreal, Quebec, 1995.

    Google Scholar 

  2. Erik R. Altman, R. Govindarajan, and Guang R. Gao. Scheduling and mapping: Software pipelining in the presence of structural hazards. In Proc. of the SIGPLAN '95 Conf. on Programming Language Design and Implementation, La Jolla, Calif., Jun. 18–21, 1995. ACM SIGPLAN.

    Google Scholar 

  3. James C. Dehnert and Ross A. Towle. Compiling for Cydra 5. J. of Supercomputing, 7:181–227, May 1993.

    Article  Google Scholar 

  4. Kemal Ebcioglu and Toshio Nakatani. A new compilation technique for parallelizing loops with unpredictable branches on a VLIW architecture. In David Gelernter, Alexandru Nicolau, and David Padua, editors, Languages and Compilers for Parallel Computing, Res. Monographs in Parallel and Distrib. Computing, chapter 12, pages 213–229. Pitman Pub. and the MIT Press, London, England, and Cambridge, Mass., 1990. Selected papers from the Second Work. on Languages and Compilers for Parallel Computing, Urbana, Ill., Aug. 1–3, 1989.

    Google Scholar 

  5. Alexandre E. Eichenberger, Edward S. Davidson, and Santosh G. Abraham. Minimum register requirements for a modulo schedule. In Proc. of the 27th Ann. Intl. Symp. on Microarchitecture, pages 75–84, San Jose, Calif., Nov. 30–Dec.2, 1994. ACM SIGMICRO and IEEE-CS TC-MICRO.

    Google Scholar 

  6. P. Feautrier. Fine-grain Scheduling under Resource Constraints. In Seventh Annual Workshop on Languages and Compilers for Parallel Computing, Ithaca, USA, Aug 1994.

    Google Scholar 

  7. M. R. Garey and D. S. Johnson. Computers and Intractability: A Guide to the Theory of NP-Completeness. W. H. Freeman and Company, New York, N. Y., 1979.

    Google Scholar 

  8. F. Gasperoni and U. Schwiegelshohn. Efficient algorithms for cyclic scheduling. Res. Rep. RC 17068, IBM TJ Watson Res. Center, Yorktown Heights, NY, 1991.

    Google Scholar 

  9. R. Govindarajan, Erik R. Altman, and Guang R. Gao. Minimizing register requirements under resource-constrained rate-optimal software pipelining. In Proc. of the 27th Ann. Intl. Symp. on Microarchitecture, pages 85–94, San Jose, Calif., Nov. 30–Dec.2, 1994. ACM SIGMICRO and IEEE-CS TC-MICRO.

    Google Scholar 

  10. P.Y.T. Hsu. Highly concurrent scalar processing. Technical report, University of Illinois at Urbana-Champagne, Urbana, IL, 1986. Ph.D. Thesis.

    Google Scholar 

  11. Richard A. Huff. Lifetime-sensitive modulo scheduling. In Proc. of the SIGPLAN '93 Conf. on Programming Language Design and Implementation, pages 258–267, Albuquerque, N. Mex., Jun. 23–25, 1993. ACM SIGPLAN. SIGPLAN Notices, 28(6), Jun. 1993.

    Google Scholar 

  12. Monica Lam. Software pipelining: An effective scheduling technique for VLIW machines. In Proc. of the SIGPLAN '88 Conf. on Programming Language Design and Implementation, pages 318–328, Atlanta, Georgia, Jun. 22–24, 1988. ACM SIGPLAN. SIGPLAN Notices, 23(7), Jul. 1988.

    Google Scholar 

  13. Soo-Mook Moon and Kemal Ebcioğlu. An efficient resource-constrained global scheduling technique for superscalar and VLIW processors. In Proc. of the 25th Ann. Intl. Symp. on Microarchitecture, pages 55–71, Portland, Ore., Dec. 1–4, 1992. ACM SIGMICRO and IEEE-CS TC-MICRO.

    Google Scholar 

  14. Q. Ning and G. R. Gao. A novel framework of register allocation for software pipelining. In Conf. Rec. of the Twentieth Ann. ACM SIGPLAN-SIGACT Symp. on Principles of Prog Languages, pages 29–42, Charleston, S. Carolina, Jan. 10–13, 1993.

    Google Scholar 

  15. B. R. Rau and J. A. Fisher. Instruction-level parallel processing: History, overview and perspective. J. of Supercomputing, 7:9–50, May 1993.

    Article  Google Scholar 

  16. B. R. Rau and C. D. Glaeser. Some scheduling techniques and an easily schedulable horizontal architecture for high performance scientific computing. In Proc. of the 14th Ann. Microprogramming Work., pages 183–198, Chatham, Mass., Oct. 12–15, 1981. ACM SIGMICRO and IEEE-CS TC-MICRO.

    Google Scholar 

  17. B. Ramakrishna Rau. Iterative modulo scheduling: An algorithm for software pipelining loops. In Proc. of the 27th Ann. Intl. Symp. on Microarchitecture, pages 63–74, San Jose, Cal, Nov 30–Dec 2, 1994. ACM SIGMICRO & IEEE-CS TC-MICRO.

    Google Scholar 

  18. Raymond Reiter. Scheduling parallel computations. J. of the ACM, 15(4):590–599, Oct. 1968.

    Article  Google Scholar 

  19. J. Wang and E. Eisenbeis. A new approach to software pipelining of complicated loops with branches. Res. rep. no., Institut Nat. de Recherche en Informatique et en Automatique (INRIA), Rocquencourt, France, Jan. 1993.

    Google Scholar 

  20. Nancy J. Warter, John W. Bockhaus, Grant E. Haab, and Krishna Subramanian. Enhanced modulo scheduling for loops with conditional branches. In Proc. of the 25th Ann. Intl. Symp. on Microarchitecture, pages 170–179, Portland, Ore., Dec. 1–4, 1992. ACM SIGMICRO and IEEE-CS TC-MICRO.

    Google Scholar 

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Author information

Authors and Affiliations

  1. Dept. of Electrical Engineering, McGill University, H3A 2A7, Montreal, Canada

    Erik R. Altman

  2. Dept. of Computer Science, Memorial Univ. of Newfoundland, A1B 3X5, St. John's

    R. Govindarajan

  3. School of Computer Science, McGill University, H3A 2A7, Montreal, Canada

    Guang R. Gao

Authors
  1. Erik R. Altman
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  2. R. Govindarajan
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  3. Guang R. Gao
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Editor information

Chua-Huang Huang Ponnuswamy Sadayappan Utpal Banerjee David Gelernter Alex Nicolau David Padua

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© 1996 Springer-Verlag Berlin Heidelberg

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Altman, E.R., Govindarajan, R., Gao, G.R. (1996). An experimental study of an ILP-based exact solution method for software pipelining. In: Huang, CH., Sadayappan, P., Banerjee, U., Gelernter, D., Nicolau, A., Padua, D. (eds) Languages and Compilers for Parallel Computing. LCPC 1995. Lecture Notes in Computer Science, vol 1033. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0014189

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  • DOI: https://doi.org/10.1007/BFb0014189

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-60765-6

  • Online ISBN: 978-3-540-49446-1

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