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ARCHER: an automated RF-IC Rx front-end circuit design tool

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Abstract

This paper presents a tool capable of automatically compiling the circuit of a direct-conversion receiver at the schematics level based on system specifications that include the frequency of operation, gain, noise figure, IIP2 and IIP3 linearity. The front-end of a direct-conversion receiver is built using inductive source degeneration (LSD) LNA and double-balanced source-degenerated Gilbert Cell mixers with charge injection. The tool uses power constrained noise and linearity optimization vector-space algorithms that automatically size the transistors, passive components, and find the optimum biasing points. The solution generated by the tool is automatically read by Agilent ADS where the blocks are easily fine-tuned and validated before layout. Case studies involving WiMAX, UMTS, GSM, Bluetooth and WLAN are presented to reveal the capabilities of the tool in reducing the design time.

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References

  1. Seepold, R. (1999). Virtual socket interface alliance. Design, automation and test in Europe conference and exhibition 1999. Proceedings, 182–182.

  2. Castro-Lopez, R., Fernandez, F. V., Medeiro, F., & Rodriguez-Vazquez, A. (2002). Generation of technology-independent retargetable analog blocks (Vol. 33, pp. 157–170). International Journal of Analog IC and Signal Processing, Kluwer Academic Publishers.

  3. Castro-Lopez, R., Fernandez, F. V., Delgado-Restituto, M., Medeiro, F., & Rodriguez-Vazquez, A. (2001). Creating flexible analogue IP blocks. Solid-State Circuits Conference, 2001. ESSCIRC 2001. Proceedings of the 27th European, 437–440, 18–20.

  4. Jangkrajarng, N., Sambuddha, B., Hartono, R., & Shi, C.-J.R. (2004). Multiple specifications radio-frequency integrated circuit design with automatic template-driven layout retargeting. Design Automation Conference, 2004. Proceedings of the ASP-DAC 2004. Asia and South Pacific, 394–399, 27–30.

  5. Lee, T. H. (2004). The design of CMOS radio-frequency integrated circuits (2nd ed.). Cambridge University Press.

  6. Soorapanth, T., & Lee, T.H. (1997). RF linearity of short-channel MOSFETs. International Workshop on design of mixed-mode integrated circuits and applications.

  7. Darabi, H., & Abidi, A. A. (2000). Noise in RF-CMOS mixers: a simple physical model. Solid-State Circuits, IEEE Journal of, 35(1), 15–25.

    Article  Google Scholar 

  8. Abidi, A. A. (2003). General relations between IP2, IP3, and offsets in differential circuits and the effects of feedback. Microwave Theory and Techniques, IEEE Transactions on, 51(5), 1610–1612.

    Article  Google Scholar 

  9. Sansen, W. (1999). Distortion in elementary transistor circuits. Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on [see also Circuits and Systems II: Express Briefs, IEEE Transactions on], 46(3), 315–325.

    Article  Google Scholar 

  10. Manstretta, D., Brandolini, M., & Svelto, F. (2003). Second-order intermodulation mechanisms in CMOS downconverters. Solid-State Circuits, IEEE Journal of, 38(3), 394–406.

    Article  Google Scholar 

  11. Agnelli, F., Albasini, G., Bietti, I., Gnudi, A., Lacaita, A., Manstretta, D., Rovatti, R., Sacchi, E., Savazzi, P., Svelto, F., Temporiti, E., Vitali, S., & Castello, R. (2006). Wireless multi-standard terminals: system analysis and design of a reconfigurable RF front-end. Circuits and Systems Magazine, IEEE, 6(1), 38–59, First Quarter.

    Article  Google Scholar 

  12. Brandolini, M., Rossi, P., Manstretta, D., & Svelto, F. (2005). Toward multistandard mobile terminals—fully integrated receivers requirements and architectures. Microwave Theory and Techniques, IEEE Transactions on, 53(3), 1026–1038.

    Article  Google Scholar 

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Acknowledgement

The authors would like to thank the other members of the RaMSiS group at the Royal Institute of Technology (KTH), Sweden, for the valuable discussions regarding this work. They would also like to thank the Swedish Foundation for Strategic Research (SSF) and the Swedish Research Council (VR) for funding this work.

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Correspondence to Saul Rodriguez.

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Rodriguez, S., Atallah, J.G., Rusu, A. et al. ARCHER: an automated RF-IC Rx front-end circuit design tool. Analog Integr Circ Sig Process 58, 255–270 (2009). https://doi.org/10.1007/s10470-008-9170-0

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  • DOI: https://doi.org/10.1007/s10470-008-9170-0

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