Abstract
This paper presents a tool capable of automatically compiling the circuit of a direct-conversion receiver at the schematics level based on system specifications that include the frequency of operation, gain, noise figure, IIP2 and IIP3 linearity. The front-end of a direct-conversion receiver is built using inductive source degeneration (LSD) LNA and double-balanced source-degenerated Gilbert Cell mixers with charge injection. The tool uses power constrained noise and linearity optimization vector-space algorithms that automatically size the transistors, passive components, and find the optimum biasing points. The solution generated by the tool is automatically read by Agilent ADS where the blocks are easily fine-tuned and validated before layout. Case studies involving WiMAX, UMTS, GSM, Bluetooth and WLAN are presented to reveal the capabilities of the tool in reducing the design time.
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Acknowledgement
The authors would like to thank the other members of the RaMSiS group at the Royal Institute of Technology (KTH), Sweden, for the valuable discussions regarding this work. They would also like to thank the Swedish Foundation for Strategic Research (SSF) and the Swedish Research Council (VR) for funding this work.
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Rodriguez, S., Atallah, J.G., Rusu, A. et al. ARCHER: an automated RF-IC Rx front-end circuit design tool. Analog Integr Circ Sig Process 58, 255–270 (2009). https://doi.org/10.1007/s10470-008-9170-0
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DOI: https://doi.org/10.1007/s10470-008-9170-0