Abstract
This paper presents a design-for-diagnosis method to identify error sources in pipelined analog-to-digital converters (ADCs). In the proposed method, the stage under test (SUT) is configured to separate each error effect contained in its output residual signal. Two stages after the SUT are configured as a cyclic ADC to digitize the residual output voltage of the SUT. Critical circuit parameters, namely, op-amp gain, capacitor mismatch, op-amp offset, and comparator offset, are identified in the digital domain. Accurate analog test input signals are not necessary for the proposed design-for-diagnosis scheme. A simple digital decoder is employed to generate test control signals. Several additional switches are used to perform SUT re-configuration, which induce minor area overhead. Behavioral and circuit simulations are performed to show the effectiveness of the proposed method.
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Acknowledgment
This work was supported in part by the grant of NSC-99-2221-E-151-064- from National Science Council (NSC), Taiwan.
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Lin, JF., Ting, HW. Digital Design-for-Diagnosis Method for Error Identification of Pipelined ADCs. J Electron Test 27, 697–709 (2011). https://doi.org/10.1007/s10836-011-5252-5
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DOI: https://doi.org/10.1007/s10836-011-5252-5