Abstract
Defect clusters on the wafer map can provide important clue to identify the process failures so that it is important to accurately classify the defect patterns into corresponding pattern types. In this research, we present an image-based wafer map defect pattern classification method. The presented method consists of two main steps: without any specific preprocessing, high-level features are extracted from convolutional neural network and then the extracted features are fed to combination of error-correcting output codes and support vector machines for wafer map defect pattern classification. To the best of our knowledge, no prior work has applied the presented method for wafer map defect pattern classification. Experimental results tested on 20,000 wafer maps show the superiority of presented method and the overall classification accuracy is up to 98.43%.
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Abbreviations
- CNN:
-
Convolutional neural networks
- ECOC:
-
Error-correcting output codes
- SVM:
-
Support vector machines
- CNN-SVM:
-
SVM classification based on CNN features
- OPTICS:
-
Ordering point to identify the cluster structure
- CART:
-
Classification and regression trees
- NB:
-
Naive Bayes
- kNN:
-
k-nearest neighbors
- ReLU:
-
Rectified linear unit
- LDA:
-
Linear discriminant analysis
- LOGISTIC:
-
Logistic regression
- CNN-ECOC-X:
-
Use CNN features for ECOC classification where X is used as binary classifiers
- ANOVA:
-
Analysis of variance
- SVE:
-
Soft voting ensemble
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Acknowledgements
Most of this work was done when the first author was at BISTel. This work was supported by the World Class 300 Project (R&D) (S2641209, “Development of next generation intelligent Smart manufacturing solution based on AI & Big data to improve manufacturing yield and productivity”) of the MOTIE, MSS(Korea) and supported by the National Natural Science Foundation of China (Grant Nos. 61702324 and 61911540482) in People’s Republic of China.
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Jin, C.H., Kim, HJ., Piao, Y. et al. Wafer map defect pattern classification based on convolutional neural network features and error-correcting output codes. J Intell Manuf 31, 1861–1875 (2020). https://doi.org/10.1007/s10845-020-01540-x
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DOI: https://doi.org/10.1007/s10845-020-01540-x