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Shipping code towards data in an inter-region serverless environment to leverage latency

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Abstract

Serverless computing emerges as a new standard to build cloud applications, where developers write compact functions that respond to events in the cloud infrastructure. Several cloud service industries started adopting serverless for deploying their applications. But one key limitation in serverless computing is that it disregards the significance of data. In the age of big data, when applications run around a huge volume, to transfer data from the data side to the computation side to co-allocate the data and code, leads to high latency. All existing serverless architectures are based on the data shipping architecture. In this paper, we present an inter-region code shipping architecture for serverless, that enables the code to flow from computation side to the data side where the size of the code is negligible compared to the data size. We tested our proposed architecture over a real-time cloud platform Amazon Web Services with the integration of the Fission serverless tool. The evaluation of the proposed code shipping architecture shows for a data file size of 64 MB, the latency in the proposed code shipping architecture is 8.36 ms and in existing data shipped architecture is found to be 16.8 ms. Hence, the proposed architecture achieves a speedup of 2x on the round latency for high data sizes in a serverless environment. We define round latency to be the duration to read and write back the data in the storage.

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Data availability

The datasets used or analyzed during the current study are available from the corresponding author on reasonable request.

Notes

  1. https://cloud.google.com/functions/.

  2. https://azure.microsoft.com/en-in/solutions/serverless/.

  3. https://www.ibm.com/in-en/cloud/functions.

  4. https://aws.amazon.com/lambda/.

  5. https://fission.io/.

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Correspondence to Biswajeet Sethi.

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Sethi, B., Addya, S.K., Bhutada, J. et al. Shipping code towards data in an inter-region serverless environment to leverage latency. J Supercomput 79, 11585–11610 (2023). https://doi.org/10.1007/s11227-023-05104-7

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