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Globally scheduled real-time multiprocessor systems with GPUs

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Abstract

Graphics processing units, GPUs, are powerful processors that can offer significant performance advantages over traditional CPUs. The last decade has seen rapid advancement in GPU computational power and generality. Recent technologies make it possible to use GPUs as co-processors to CPUs. The performance advantages of GPUs can be great, often outperforming traditional CPUs by orders of magnitude. While the motivations for developing systems with GPUs are clear, little research in the real-time systems field has been done to integrate GPUs into real-time multiprocessor systems. We present two real-time analysis methods, addressing real-world platform constraints, for such an integration into a soft real-time multiprocessor system and show that a GPU can be exploited to achieve greater levels of total system performance.

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Notes

  1. Notable platforms include the Compute Unified Device Architecture (CUDA) from NVIDIA (CUDA Zone, URL http://www.nvidia.com/object/cuda_home_new.html), Stream from AMD/ATI (ATI Stream Technology, URL http://www.amd.com/US/PRODUCTS/TECHNOLOGIES/STREAM-TECHNOLOGY/Pages/stream-technology.aspx), OpenCL from Apple and the Khronos Group (OpenCL. URL http://www.khronos.org/opencl/), and DirectCompute from Microsoft (Microsoft DirectX, URL http://www.gamesforwindows.com/en-US/directx/).

  2. China’s new nebulae supercomputer is no. 2, URL http://www.top500.org/lists/2010/06/press-release.

  3. Parallel computing with SciFinance, URL http://www.scicomp.com/parallel_computing/SciComp_NVIDIA_CUDA_OpenMP.pdf.

  4. GeForce graphics processors, URL http://www.nvidia.com/object/geforce_family.html.

  5. Intel microprocessor export compliance metrics, URL http://www.intel.com/support/processors/xeon/sb/CS-020863.htm.

  6. CUDA community showcase, URL http://www.nvidia.com/object/cuda_apps_flash_new.html.

  7. AMD Fusion Family of APUs, URL http://sites.amd.com/us/Documents/48423B_fusion_whitepaper_WEB.pdf.

  8. Intel details 2011 processor features, offers stunning visuals build-in, URL http://download.intel.com/newsroom/kits/idf/2010_fall/pdfs/Day1_IDF_SNB_Factsheet.pdf.

  9. The sample NVIDIA CUDA SDK programs were modified to use pinned memory, which prevents these memory segments from being potentially paged to disk. The use of pinned memory can significantly reduce communication overheads as the system can take advantage of direct memory access (DMA) data transfers. For example, the communication-to-execution ratio for the eigenvalue program increases to about 30% without it.

  10. NVIDIA’s Fermi architecture allows limited simultaneous execution of kernels as long as these kernels are sourced from the same host-side context/thread. In this work, we will not consider such uses.

  11. The GTX-295 actually provides two independent GPUs on a single card, though only one GPU was used in this work.

  12. Some have recently speculated that the earliest-deadline-zero-laxity (EDZL) algorithm may be better suited to accounting for self-suspensions (caused, for example, by using a GPU) (Lakshmanan et al. 2010), though actionable results have yet to be presented, so better suspension accounting remains an open problem.

  13. For performance, GPU operations may be performed asynchronously by the GPU-using job. This allows several GPU operations to be batched together and treated as a single operation, reducing the number of times the job must suspend to wait for GPU results. No changes to our task model are necessary to support this type of operation.

  14. A window-constrained scheduling algorithm prioritizes a job by a time point contained within an interval window that also contains the job’s release and deadline.

  15. Common workload profiles were solicited from research groups at UNC that frequently make use of CUDA. A poll was also informally taken at the NVIDIA CUDA online forums. Similar timing characteristics were later confirmed in the domain of computer vision for real-time automotive applications (Muyan-Ozcelik et al. 2011).

  16. Please note that some graphs appear to be missing data points at lower and upper system utilization ranges. This is caused by the occasional inability to generate task sets meeting particular scenario constraints. This was usually due to the inability to generate a task set with at least two GPU-using tasks under the given constraints.

  17. Graphs for all scenarios are available at http://www.cs.unc.edu/~anderson/papers.html.

  18. k-exclusion locks protect a resource or resource pool, allowing up to k simultaneous accesses.

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Acknowledgements

Work supported by NSF grants CNS 0834270, CNS 0834132, and CNS 1016954; ARO grant W911NF-09-0535; AFOSR grant FA9550-09-1-0549; and AFRL grant FA8750-11-1-0033.

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  1. Department of Computer Science, University of North Carolina at Chapel Hill, Campus Box 3175, Brooks Computer Science Building, 201 South Columbia Street, UNC-Chapel Hill, 27599-3175, Chapel Hill, NC, USA

    Glenn A. Elliott & James H. Anderson

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  1. Glenn A. Elliott
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Correspondence to Glenn A. Elliott.

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Elliott, G.A., Anderson, J.H. Globally scheduled real-time multiprocessor systems with GPUs. Real-Time Syst 48, 34–74 (2012). https://doi.org/10.1007/s11241-011-9140-y

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