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High-Speed, SAD Based Wavefront Sensor Architecture Implementation on FPGA

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Abstract

Wavefront aberrations caused by turbulent or rapidly changing media can considerably degrade the performance of an imaging system. To dynamically compensate these wavefront distortions adaptive optics is applied. We developed an affordable adaptive optic system which combines CMOS sensor and Liquid Crystal on Silicon (LCOS) display technology with the Field Programmable Gate Arrays (FPGA) devices parallel computing capabilities. A high-speed, accurate wavefront sensor is an elemental part of an adaptive optic system. In the paper, an efficient FPGA implementation of the Sum of Absolute Differences (SAD) algorithm, which accomplishes the correlation-based wavefront sensing, is introduced. This architecture was implemented on a Spartan-3 FPGA which is capable of real-time (>500 fps) measuring the incoming wavefront.

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Authors and Affiliations

  1. Department of Electrical Engineering and Information Systems, University of Pannonia, Veszprém, Hungary

    Zoltán Kincses

  2. Cellular Sensory and Wave Computing Laboratory, Computer and Automation Institute, HAS, Budapest, Hungary

    László Orzó, Zoltán Nagy & Péter Szolgay

  3. Heliophysical Observatory, Debrecen, Hungary

    György Mező

  4. Faculty of Information Technology, Pazmany Peter Catholic University, Budapest, Hungary

    Péter Szolgay

  5. Department of Computer Algorithms and Artificial Intelligence, University of Szeged, Szeged, Hungary

    Zoltán Kincses

Authors
  1. Zoltán Kincses
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  2. László Orzó
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  3. Zoltán Nagy
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  4. György Mező
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  5. Péter Szolgay
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Correspondence to Zoltán Kincses.

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Kincses, Z., Orzó, L., Nagy, Z. et al. High-Speed, SAD Based Wavefront Sensor Architecture Implementation on FPGA. J Sign Process Syst 64, 279–290 (2011). https://doi.org/10.1007/s11265-010-0487-4

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  • DOI: https://doi.org/10.1007/s11265-010-0487-4

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