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Hardware-Software Collaborative Techniques for Runtime Profiling and Phase Transition Detection

  • Special Section on Advanced Computer Systems Architecture
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Abstract

Dynamic optimization relies on runtime profile information to improve the performance of program execution. Traditional profiling techniques incur significant overhead and are not suitable for dynamic optimization. In this paper, a new profiling technique is proposed, that incorporates the strength of both software and hardware to achieve near-zero overhead profiling. The compiler passes profiling requests as a few bits of information in branch instructions to the hardware, and the processor executes profiling operations asynchronously in available free slots or on dedicated hardware. The compiler instrumentation of this technique is implemented using an Itanium research compiler. The result shows that the accurate block profiling incurs very little overhead to the user program in terms of the program scheduling cycles. For example, the average overhead is 0.6% for the SPECint95 benchmarks. The hardware support required for the new profiling is practical. The technique is extended to collect edge profiles for continuous phase transition detection. It is believed that the hardware-software collaborative scheme will enable many profile-driven dynamic optimizations for EPIC processors such as the Itanium processors.

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Authors and Affiliations

  1. Corporate Technology Group, Intel Corporation, 2200 Mission College Blvd, Santa Clara, CA, 95054, U.S.A.

    Youfeng Wu

  2. Software and Solutions Group, Intel Corporation, 2200 Mission College Blvd, Santa Clara, CA, 95054, U.S.A.

    Yong-Fong Lee

Authors
  1. Youfeng Wu
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  2. Yong-Fong Lee
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Correspondence to Youfeng Wu.

Additional information

Youfeng Wu received his B.S. degree from Fudan University and his M.S. and Ph.D. degrees from Oregon State University, in computer science. He is currently a principal engineer with Intel's Corporate Technology Group and manages a research team on multiprocessor compilation and dynamic binary optimizations. His research interests include parallel programming and transformations, multiprocessor architecture, binary and dynamic optimizations, and security and safety enhancement via compiler and binary tools.

Yong-Fong Lee received his M.S. and Ph.D. degrees from Rutgers University, both in computer science. He is currently a principal engineer with Intel's Software and Solutions Group and leading a team in working with key ISV's to optimize their solutions on Intel platforms. His technical interests include programming languages & compilers, computer architecture, and performance optimization of server applications.

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Wu, Y., Lee, YF. Hardware-Software Collaborative Techniques for Runtime Profiling and Phase Transition Detection. J Comput Sci Technol 20, 665–675 (2005). https://doi.org/10.1007/s11390-005-0665-1

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  • DOI: https://doi.org/10.1007/s11390-005-0665-1

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