Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                
Skip to main content

Principles and construction of MSD adder in ternary optical computer

  • Research Papers
  • Published:
Science China Information Sciences Aims and scope Submit manuscript

Abstract

The two remarkable features of ternary values and a massive unit with thousands bits of parallel computation will make the ternary optical computer (TOC) with modified signed-digit (MSD) adder more powerful and efficient than ever before for numerical calculations. Based on the decrease-radix design presented previously, a TOC can satisfy either a user requiring huge capacity for data calculations or one with a moderate amount of data, if it is equipped with a prepared adder. Furthermore, with the application of pipelined operations and the proposed data editing technique, the efficiency of the prepared adder can be greatly improved, so that each calculated result can be obtained almost within one clock cycle. It is hopeful that by employing a MSD adder, users will be able to enter a new dimension with the creation of a new multiplier, new divider, as well as new matrix operator in a TOC in the near future.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Subscribe and save

Springer+ Basic
$34.99 /Month
  • Get 10 units per month
  • Download Article/Chapter or eBook
  • 1 Unit = 1 Article or 1 Chapter
  • Cancel anytime
Subscribe now

Buy Now

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Similar content being viewed by others

References

  1. Caulfield H J, Vikram C S, Zavalin A. Optical logic redux. Optik, 2006, 117: 199–209

    Google Scholar 

  2. Wong W M, Blow K J. Design and analysis of an all-optical processor for modular arithmetic. Opt Commun. 2006, 265: 425–433

    Article  Google Scholar 

  3. Jitendra N R, Dilip K G. Integrated all-optical logic and arithmetic operations with the help of a TOAD-based interferometer device-alternative approach. Appl Opt. 2007, 46: 5304–5310

    Article  Google Scholar 

  4. Nishimuraa N, Awatsujib Y, Kubota T. Two-dimensional arrangement of spatial patterns representing numerical data in input images for effective use of hardware resources in digital optical computing system based on optical array logic. Parallel Distrib Comput. 2004, (64): 1027–1040

  5. Nishimuea N, Awatsuj Y, Kubota T. Performance comparison and evaluation of options for arranging data in digital optical parallel computing. Opt Soc Japan. 2003, 4: 523–533

    Google Scholar 

  6. Jin Y, He H C, Lu Y T. Ternary optical computer principle. Sci China Ser F-Inf Sci. 2003, 46: 145–150

    Article  Google Scholar 

  7. Jin Y. Management strategy of data bits in ternary optical computer. J Shanghai Univ (Nat Sci). 2007, 13: 519–523

    Google Scholar 

  8. Yan J Y, Jin Y, Zuo K Z. Decrease-radix design principle for carrying/borrowing free multi-valued and application in ternary optical computer. Sci China Ser F-Inf Sci. 2008, 51: 1415–1426

    Article  MATH  MathSciNet  Google Scholar 

  9. Jin Y, He H C, Ai L R. Lane of parallel through carry in ternary optical adder. Sci China Ser F-Inf Sci. 2005, 48: 107–116

    Article  MATH  MathSciNet  Google Scholar 

  10. Wang X C, Peng J J, Jin Y, et al. Vector-matrix multiplication based on ternary optical computer. In: The 2nd International Conference on High Performance Computing and Application (HPCA2009), 10–12th, August 2009, Shanghai China, LNCS 5938, 2010. 426–432

  11. Teng L, Peng J J, Jin Y, et al. A cellular automata calculation model based on ternary optical computer. In: The 2nd International Conference on High Performance Computing and Application, HPCA2009, 10–12th, August 2009, Shanghai China, LNCS 5938, 2010. 377–383

  12. Zhan X Q, Peng J J, Jin Y, et al. Static allocation strategy of data-bits of terry optical computer. J Shanghai Univ (Nat Sci), 2009, 15: 528–533

    Google Scholar 

  13. Avizienis A. Signed-digit number representations for fast parallel arithmetic. IRE Trans Electron Comp, 1961, EC: 389–400

    Article  MathSciNet  Google Scholar 

  14. Ha B, Li Y. Parallel modified signed-digit arithmetic using an optoelectronic shared content-addressable-memory processor. Appl Opt, 1994, (33): 3647–3662

  15. Casasent D, Woodford P. Symbolic substitution modified signed-digit optical adder. Appl Opt, 1994, (33): 1498–1506

  16. Li G Q, Qian F, Ruan H, et al. Compact parallel optical modified-signed-digit arithmetic-logic array processor with electron-trapping device. Appl Opt, 1999, (38): 5038–5045

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Yi Jin.

Rights and permissions

Reprints and permissions

About this article

Cite this article

Jin, Y., Shen, Y., Peng, J. et al. Principles and construction of MSD adder in ternary optical computer. Sci. China Inf. Sci. 53, 2159–2168 (2010). https://doi.org/10.1007/s11432-010-4091-9

Download citation

  • Received:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s11432-010-4091-9

Keywords