Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                
Skip to main content
SpringerLink
Log in

Constant Time Boolean Matrix Multiplication on a Linear Array with a Reconfigurable Pipelined Bus System

  • Published:
The Journal of Supercomputing Aims and scope Submit manuscript

Abstract

We show that the product of two N × N boolean matrices can be calculated in constant time on an LARPBS with O(N3 / log N) processors. All data communications and computations are performed on the bit level. To the best of the author's knowledge, this is the first parallel boolean matrix multiplication algorithm that has constant execution time, and is executed on a distributed memory system with (N3) processors. By using our boolean matrix multiplication algorithm, it is shown that the transitive closure of a directed graph can be obtained in O(log N) time ( measured by bit level operations) on an LARPBS with O (N3 / log N) processors. To the best of our knowledge, this is the first parallel algorithm for tansitive closure of directed graphs with time complexity O(log N) (comparable to that of CRCW PRAM) and cost O (N3) on a realistic parallel computing model, which has no shared memory, and interprocessor communications are dealt with explicitly and efficiently.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Subscribe and save

Springer+ Basic
$34.99 /Month
  • Get 10 units per month
  • Download Article/Chapter or eBook
  • 1 Unit = 1 Article or 1 Chapter
  • Cancel anytime
Subscribe now

Buy Now

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Similar content being viewed by others

References

  1. A.V. Aho, J.E. Hopcroft, and J.D. Ullman. The Design and Analysis of Computer Algorithms, Addison-Wesley, Reading, Massachusetts, 1974.

    Google Scholar 

  2. S.G. Akl. Parallel Computation: Models and Methods, Prentice-Hall, Upper Saddle River, NewJersey, 1997.

    Google Scholar 

  3. V.L. Arlazarov, E.A. Dinic, M.A. Kronrod, and I.A. Faradzev. On economic construction of the transitive closure of a direct graph. Soviet Mathematics, Doklady, 11:1209-1210, 1970.

    Google Scholar 

  4. A.F. Benner, H.F. Jordan, and V.P. Heuring. Digital optical computing with optically switched directional couplers. Optical Engineering, 30:1936-1941, 1991.

    Google Scholar 

  5. D. Bini and V. Pan. Polynomial and Matrix Computations, Vol.1, Fundamental Algorithms, Birkhäuser, Boston, 1994.

    Google Scholar 

  6. A. Chandra, L. Stockmeyer, and U. Vishkin. Constant depth reducibility. SIAM Journal on Computing, 13:423-439, 1984.

    Google Scholar 

  7. D. Chiarulli, R. Melhem, and S. Levitan. Using coincident optical pulses for parallel memory addressing. IEEE Computer, 30:48-57, 1987.

    Google Scholar 

  8. D. Coppersmith and S. Winograd. Matrix multiplication via arithmetic progressions. Journal of Symbolic Computation, 9:251-280, 1990.

    Google Scholar 

  9. E. Dekel, D. Nassimi, and S. Sahni. Parallel matrix and graph algorithms. SIAM Journal on Computing, 10:657-673, 1981.

    Google Scholar 

  10. P.W. Dowd. Wavelength division multiple access channel hypercube processor interconnection. IEEE Transactions on Computers, 41:1223-1241, 1992.

    Google Scholar 

  11. Z. Guo. Sorting on array processors with pipelined buses. Proceedings of International Conference on Parallel Processing, pp.289-292, August 1992.

  12. Z. Guo, R. Melhem, R. Hall, D. Chiarulli, and S. Levitan. Pipelined communications in optically interconnected arrays. Journal of Parallel and Distributed Computing, 12:269-282, 1991.

    Google Scholar 

  13. M. Hamdi and Y. Pan. Efficient parallel algorithms on optically interconnected arrays of processors. IEE Proceedings-Computers and Digital Techniques, vol.142, pp.87-92, March 1995.

    Google Scholar 

  14. J. JáJá. An Introduction to Parallel Algorithms, Addison-Wesley, Reading, Massachusetts, 1992.

    Google Scholar 

  15. S. Levitan, D. Chiarulli, and R. Melhem. Coincident pulse techniques for multiprocessor interconnection structures. Applied Optics, 29:2024-2039, 1990.

    Google Scholar 

  16. K. Li. Boolean matrix multiplication on a linear array with a reconfigurable pipelined bus system. Proceedings of 11th Annual International Symposium on High Performance Computing Systems, pp.179-190, Winnipeg, Manitoba, Canada, July 1997.

  17. K. Li, Y. Pan, and S.-Q. Zheng. Fast and processor efficient parallel matrix multiplication algorithms on a linear array with a reconfigurable pipelined bus system. Technical Report #96-004, Department of Computer Science, Louisiana State University, Baton Rouge, LA, 1996.

    Google Scholar 

  18. K. Li, Y. Pan, and S.-Q. Zheng. Fast and efficient parallel matrix computations on a linear array with a reconfigurable pipelined bus system. Technical Report #97-001, Department of Computer Science, Louisiana State University, Baton Rouge, LA, 1997.

    Google Scholar 

  19. K. Li, Y. Pan, and S.-Q. Zheng. Simulation of parallel random access machines on linear arrays with reconfigurable pipelined bus systems. Proceedings of International Conference on Parallel and Distributed Processing Techniques and Applications, Vol. II, pp. 590-599, Las Vegas, Nevada, June 1997. Also see Working Paper #97-02, Center for Business and Economic Research (CBER), University of Dayton, Dayton, Ohio, February 1997.

    Google Scholar 

  20. Y. Li, Y. Pan, and S.-Q. Zheng. A pipelined TDM optical bus with conditional delays. Technical Report #96-002, Department of Computer Science, Louisiana State University, Baton Rouge, LA, 1996.

    Google Scholar 

  21. Y. Li and S.-Q. Zheng. Parallel selection on a pipelined TDM optical buses. Proceedings of International Conference on Parallel and Distributed Computing Systems, pp. 69-73, Dijon, France, September 1996.

  22. Y. Pan. Hough transform on arrays with an optical bus. Proceedings of Fifth International conference on Parallel and Distributed Computing and Systems, pp. 161-166, October 1992.

  23. Y. Pan, “Order statistics on optically interconnected multiprocessor systems,” Proceedings of the First International Workshop on Massively Parallel Processing Using Optical Interconnections, pp. 162-169, April 1994.

  24. Y. Pan, M. Hamdi, and K. Li. Efficient and scalable quicksort on a linear array with a reconfigurable pipelined bus system. Future Generation Computer Systems, forthcoming. A preliminary version appeared in Proceedings of IEEE International Symposium on Parallel Architectures, Algorithms, and Networks, pp. 313-319, June 1996.

  25. Y. Pan and M. Hamdi. Efficient computation of singular value decomposition on arrays with pipelined optical buses. Journal of Network and Computer Applications, 19:235-248, 1996.

    Google Scholar 

  26. Y. Pan and K. Li. Linear array with a reconfigurable pipelined bus system -- concepts and applications. Proceedings of International Conference on Parallel and Distributed Processing Techniques and Applications, vol.III, pp. 1431-1442, August 1996. Also to appear in Special Issue on Parallel and Distributed Processing and Applications in Information Sciences – An International Journal, 1997.

    Google Scholar 

  27. Y. Pan, K. Li, and S.-Q. Zheng. Fast nearest neighbor algorithms on a linear array with a reconfigurable pipelined bus system. Technical Report #97-002, Department of Computer Science, Louisiana State University, Baton Rouge, LA, 1997.

    Google Scholar 

  28. V. Pan. Parallel solution of sparse linear and path systems. In J.H. Reif, ed., Synthesis of Parallel Algorithms, pp. 621-678, Morgan Kaufmann, San Mateo, California, 1993.

    Google Scholar 

  29. S. Pavel. Computation and Communication Aspects of Arrays with Optical Pipelined Buses. Ph.D. Thesis, Dept. of Computing and Information Science, Queen's University, Ontario, Canada, 1996.

    Google Scholar 

  30. S. Pavel and S.G. Akl. Matrix operations using arrays with reconfigurable optical buses. Journal of Parallel Algorithms and Applications, 8:223-242, 1996.

    Google Scholar 

  31. S. Paveland S.G. Akl. On the power of arrays with reconfigurable optical buses. Proceedings of International Conference on Parallel and Distributed Processing Techniques and Applications, vol. III, pp. 1443-1454, August 1996.

    Google Scholar 

  32. C. Qiao and R. Melhem. Time-division optical communications in multiprocessor arrays. IEEE Transactions on Computers, 42:577-590, 1993.

    Google Scholar 

  33. S. Rajasekaran and S. Sahni. Sorting, selection and routing on the array with reconfigurable optical buses. IEEE Transactions on Parallel and Distributed Systems, forthcoming.

  34. V. Strassen. Gaussian elimination is not optimal. Numerische Mathematik, 13:354-356, 1969.

    Google Scholar 

  35. B.-F. Wang and G.-H. Chen. Constant time algorithms for the transitive closure and some related graph problems on processor arrays with reconfigurable bus systems. IEEE Transactions on Parallel and Distributed Systems, 1:500-507, 1991.

    Google Scholar 

Download references

Author information

Authors and Affiliations

  1. Dept. of Mathematics and Computer Science, State Univ. of New York, New Paltz, NY, 12561

    Keqin Li

Authors
  1. Keqin Li
    View author publications

    You can also search for this author in PubMed Google Scholar

Rights and permissions

Reprints and permissions

About this article

Cite this article

Li, K. Constant Time Boolean Matrix Multiplication on a Linear Array with a Reconfigurable Pipelined Bus System. The Journal of Supercomputing 11, 391–403 (1997). https://doi.org/10.1023/A:1007922924139

Download citation

  • Issue Date:

  • DOI: https://doi.org/10.1023/A:1007922924139

Search

Navigation