Abstract
This paper reports two contributions to the theory and practice of using reconfigurable hardware to implement search engines based on hashing techniques. The first contribution concerns technology-independent optimisations involving run-time reconfiguration of the hash functions; a quantitative framework is developed for estimating design trade-offs, such as the amount of temporary storage versus reconfiguration time. The second contribution concerns methods for optimising implementations in Xilinx FPGA technology, which achieve different trade-offs in cell utilisation, reconfiguration time and critical path delay; quantitative analysis of these trade-offs are provided.
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References
D. Buell, J. Arnold, and W. Kleinfelder, Splash 2, FPGAs in a Custom Computing Machine, IEEE Computer Society Press, 1996.
E. Lemoine and D. Merceron, “Run Time Reconfiguration of FPGAs for Scanning Genomic Databases, ” in Proc.IEEE Sym-posium on FPGAsfor Custom Computing Machines, IEEE Com-puter Society Press, 1995, pp. 90–98.
E. Mosanya and E. Sanchez, “A FPGA-based Hardware Im-plementation of Generalized Profile Search using Online Arithmetic, ” in Proc.ACM/SIGDA Int.Symp.on FPGAss, ACMPress, 1999, pp. 101–111.
W. Luk, N. Shirazi, and P.Y.K. Cheung, “Compilation Tools for Run-time Reconfigurable Designs, ” in Proc.IEEE Symposium on FPGAs for Custom Computing Machines, IEEE Computer Society Press, 1997.
N. Shirazi, W. Luk, and P.Y.K. Cheung, “Run-time Management of Dynamically Reconfigurable Designs, ” in Field Programmable Logic and Applications, R.W. Hartenstein and A. Keevallik (Eds.), LNCS 1482, Springer, 1998, pp. 59–68.
W. Luk, N. Shirazi, S.R. Guo, and P.Y.K. Cheung, “Pipeline Morphing and Virtual Pipelines, ” in Field Programmable Logic and Applications, W. Luk, P.Y.K. Cheung, and M. Glesner (Eds.), LNCS 1304, Springer, 1997, pp. 111–120.
W. Luk, N. Shirazi, and P.Y.K. Cheung, “Modelling and Opti-mising Run-time Reconfigurable Systems, ” in Proc.IEEE Sym-posium on FPGAsfor Custom Computing Machines, IEEE Com-puter Society Press, 1996, pp. 167–176.
M.J. Wirthlin and B.L. Hutchings, “Improving Functional Den-sity Through Run-time Constant Propagation, ” in Proc.ACM Int.Symp.on FPGAs, ACM Press, 1997, pp. 86–92.
S. Churcher, T. Kean, and B. Wilkie, “The XC6200 FastMap Processor Interface, ” in Field Programmable Logic and Applications, W. Moore and W. Luk (Eds.), LNCS 975, Springer, 1995, pp. 36–43.
W. Luk, S. Guo, N. Shirazi, and N. Zhuang, “A Frame-work for Developing Parametrised FPGA Libraries, ” in Field-Programmable Logic, Smart Applications, New Paradigms and Compilers, LNCS 1142, Springer, 1996, pp. 24–33.
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Shirazi, N., Benyamin, D., Luk, W. et al. Quantitative Analysis of FPGA-based Database Searching. The Journal of VLSI Signal Processing-Systems for Signal, Image, and Video Technology 28, 85–96 (2001). https://doi.org/10.1023/A:1008163222529
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DOI: https://doi.org/10.1023/A:1008163222529