Abstract
This paper describes the architectural configuration and various design trade-offs of the Electrically Programmable Analog Circuit (EPACTM), an expert-cell approach to meeting the market needs for an analog counterpart to the digital FPGA. The paper provides an overview of the technology, discusses architectural issues, and describes the internal operation of the first commercial EPAC devices. The paper concludes with various application examples and performance measurements.
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Klein, H.W. The EPAC Architecture: An Expert Cell Approach to Field Programmable Analog Devices. Analog Integrated Circuits and Signal Processing 17, 91–103 (1998). https://doi.org/10.1023/A:1008297832410
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DOI: https://doi.org/10.1023/A:1008297832410