Abstract
We propose an algorithm for assessing probabilistic timing constraints for systems including components with uncertain delays. We make a case for designing systems based on a probabilistic relaxation of such constraints, as this has the potential for resulting in lower silicon area and/or power consumption. We consider a concrete example, an MPEG decoder, for which we discuss modeling and assessment of probabilistic throughput constraints.
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de Veciana, G., Jacome, M. & Guo, JH. Assessing Probabilistic Timing Constraints on System Performance. Design Automation for Embedded Systems 5, 61–81 (2000). https://doi.org/10.1023/A:1008991500612
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DOI: https://doi.org/10.1023/A:1008991500612