Quantum Dynamics for Energetic Advantage in a Charge-Based Classical Full Adder

Open Access

Quantum Dynamics for Energetic Advantage in a Charge-Based Classical Full Adder

João P. Moutinho, Marco Pezzutto, Sagar Silva Pratapsi, Francisco Ferreira da Silva, Silvano De Franceschi, Sougato Bose, António T. Costa, and Yasser Omar

PRX Energy 2, 033002 – Published 12 July 2023

Abstract

We present a proposal for a one-bit full adder to process classical information based on a few electrons in a triple quantum dot system, serving as a proof of principle for the development of energy-efficient information technologies operating through coherent quantum dynamics. The device works via the repeated execution of a Fredkin gate implemented through the dynamics of a single time-independent Hamiltonian. Our proposal uses realistic parameter values and could be implemented on currently available quantum dot architectures. We compare the estimated energetic costs for operating our full adder with those of well-known fully classical devices, and we identify a few important factors for the future success of this technology.

Received 7 August 2022
Revised 28 May 2023
Accepted 31 May 2023

DOI:https://doi.org/10.1103/PRXEnergy.2.033002

Published by the American Physical Society under the terms of the Creative Commons Attribution 4.0 International license. Further distribution of this work must maintain attribution to the author(s) and the published article's title, journal citation, and DOI.

Published by the American Physical Society

Physics Subject Headings (PhySH)

Coulomb blockade Quantum gates Quantum information with solid state qubits Scaling of energy technologies

Quantum dots

Hubbard model

Quantum Information, Science & TechnologyCondensed Matter, Materials & Applied PhysicsEnergy Science & Technology

Authors & Affiliations

João P. Moutinho^1,2,*, Marco Pezzutto³, Sagar Silva Pratapsi^1,2, Francisco Ferreira da Silva^4,5, Silvano De Franceschi ⁶, Sougato Bose⁷, António T. Costa ⁸, and Yasser Omar^1,3,9,†

¹Instituto Superior Técnico, Universidade de Lisboa, Lisbon, Portugal
²Instituto de Telecomunicações, Lisbon, Portugal
³PQI – Portuguese Quantum Institute, Avenida das Nações Unidas, 1600-531 Lisbon, Portugal
⁴QuTech, Delft University of Technology, Lorentzweg 1, 2628 CJ Delft, Netherlands
⁵Kavli Institute of Nanoscience, Delft University of Technology, Lorentzweg 1, 2628 CJ Delft, Netherlands
⁶Universit Grenoble Alpes, CEA, Grenoble-INP, IRIG-Pheliqs, 17 Avenue des Martyrs, 38000 Grenoble, France
⁷Department of Physics and Astronomy, University College London, Gower Street, London, WC1E 6BT, United Kingdom
⁸International Iberian Nanotechnology Laboratory, Avenida Mestre José Veiga, 4715-330 Braga, Portugal
⁹Physics of Information and Quantum Technologies Group, Centro de Física e Engenharia de Materiais Avançados (CeFEMA), Portugal

^*joao.p.moutinho@tecnico.ulisboa.pt
^†contact.yasser@pqi.pt

Popular Summary

At the heart of the modern computer is the CMOS transistor. With transistor manufacturing techniques now in the nanometer range, these devices are reaching their miniaturization limits. At these scales, unwanted quantum effects are a concern, and thermodynamic restrictions due to single-device dissipation severely limit device density. As an alternative computing technology, here the authors propose that logic devices whose operation relies on quantum dynamics, similarly to quantum gates being developed for quantum computation, may be used as energy-efficient building blocks for classical computation. Such a computer would not require the same level of isolation from the environment as a quantum computer, as coherence would be needed only at the level of each individual gate. This approach may facilitate the development of a scalable architecture, while still taking advantage of the efforts being put into the development of a quantum computer. In this proposal the authors study a proof-of-principle universal gate using semiconductor quantum dots, which could benefit from the already advanced semiconductor fabrication techniques behind modern electronics. The authors compare the energy use of the proposed gate with that of modern computers and highlight the challenges that remain to achieve energy-efficient classical computation exploiting quantum dynamics.

Key Image

Article Text

Click to Expand

Supplemental Material

Click to Expand

References

Click to Expand

Issue

Vol. 2, Iss. 3 — July - September 2023

Reuse & Permissions

Author publication services for translation and copyediting assistance advertisement

Images

Figure 1
Fredkin gate dynamics. (a) Interactions represented by the Hamiltonian in Eq. (2). By default, we consider the energy levels of QD1 and QD2 to be tuned at resonance ( $ε_{1} = ε_{2}$ ), allowing the tunneling of electrons. The presence of electrons in QD0 translates to a shift in the energy levels of QD1 produced by the capacitive coupling between these two quantum dots, which detunes QD1 from QD2, thus blocking any coherent tunneling. (b),(c) Amplitude squared (population) of logical states as a function of time obtained by the time evolution of the Hamiltonian in Eq. (2) for two example initial states, $| 001 ⟩$ and $| 101 ⟩$ , respectively, showing the conditional swap operation. We label only the relevant logical states, in color, and represent all leakage states in gray. We use $Γ \sim 44 μ eV$ , $U = 21.83 Γ$ , $V = 10 Γ$ , and $ε_{0} = ε_{1} = ε_{2} = 0$ , estimates based on realistic values from the experimental literature [45].
Reuse & Permissions
Figure 2
One-bit full adder with Fredkin gates. (a) A single-bit full adder summing bits p, q, and r composed of Fredkin gates can be implemented with two extra ancilla bits initialized in $0$ and $1$ . (b) To represent the same operation with only three physical bits, we collapse the top three lines into a single line representing the control bit for each Fredkin gate. The control bit, first initialized to the logical state $| p ⟩$ , must be reinitialized with other logical states during the protocol, marked in the circuit by the left-pointing red triangles. After the third Fredkin gate, the second bit must be measured to save the $| parity ⟩$ value, which is part of the full-adder output. Then, a swap operation changes $| parity ⟩$ to the top bit to be used as a control bit in the following Fredkin gate. The final Fredkin gate is done after reinitialization of the control bit with $| q ⟩$ . The output $| carry ⟩$ from the second bit and the previous $| parity ⟩$ value form the output of the full adder. The extra $| g ⟩$ output serves only to maintain logical reversibility.
Reuse & Permissions
Figure 3
One-bit full adder with three quantum dots. Schematic representation of the logical states in all three quantum dots, where QD0 is represented by the top row, QD1 by the middle row, and QD2 by the bottom row. The seven steps of the protocol are represented from left to right. Considering three initially empty quantum dots, the states $| p ⟩$ and $| 0 ⟩$ are loaded to QD0 and QD1, respectively (step 0). The coherent Hamiltonian dynamics are then unfrozen by activation of the coupling $Γ$ during a time $t^{*}$ corresponding to the Fredkin gate time. In steps 1 and 2, the state of QD0 is loaded with $| q ⟩$ and $| r ⟩$ , respectively, and two more Fredkin gates are executed. In step 3, the state of QD1 corresponds to the parity bit, which must be measured: if it is 1, the on-site potential $ϵ_{0}$ is raised to $2 V = 20 Γ$ , and if it is 0, $ϵ_{0}$ is unchanged. With this condition on $ϵ_{0}$ , and by then activating $Γ^{*}$ , the states of QD0 and QD1 swap independently of the state of QD2. After this auxiliary swap operation, $Γ$ can be activated to complete step 4. In step 5, the last Fredkin gate is performed by loading $| q ⟩$ into QD0. Finally, in step 6, the carry bit can be read out of QD1, and the full adder is complete.
Reuse & Permissions

PRX Energy