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Accurate branch prediction for short threads

Published: 01 March 2008 Publication History

Abstract

Multi-core processors, with low communication costs and high availability of execution cores, will increase the use of execution and compilation models that use short threads to expose parallelism. Current branch predictors seek to incorporate large amounts of control flow history to maximize accuracy. However, when that history is absent the predictor fails to work as intended. Thus, modern predictors are almost useless for threads below a certain length.
Using a Speculative Multithreaded (SpMT) architecture as an example of a system which generates shorter threads, this work examines techniques to improve branch prediction accuracy when a new thread begins to execute on a different core. This paper proposes a minor change to the branch predictor that gives virtually the same performance on short threads as an idealized predictor that incorporates unknowable pre-history of a spawned speculative thread. At the same time, strong performance on long threads is preserved. The proposed technique sets the global history register of the spawned thread to the initial value of the program counter. This novel and simple design reduces branch mispredicts by 29% and provides as much as a 13% IPC improvement on selected SPEC2000 benchmarks.

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Published In

cover image ACM SIGOPS Operating Systems Review
ACM SIGOPS Operating Systems Review  Volume 42, Issue 2
ASPLOS '08
March 2008
339 pages
ISSN:0163-5980
DOI:10.1145/1353535
Issue’s Table of Contents
  • cover image ACM Conferences
    ASPLOS XIII: Proceedings of the 13th international conference on Architectural support for programming languages and operating systems
    March 2008
    352 pages
    ISBN:9781595939586
    DOI:10.1145/1346281
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

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Publication History

Published: 01 March 2008
Published in SIGOPS Volume 42, Issue 2

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Author Tags

  1. branch prediction
  2. chip multiprocessors

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  • (2017)Branch Prediction Migration for Multi-Core Architectures2017 International Conference on Networking, Architecture, and Storage (NAS)10.1109/NAS.2017.8026848(1-2)Online publication date: Aug-2017
  • (2017)Improving Branch Prediction for Thread Migration on Multi-core ArchitecturesNetwork and Parallel Computing10.1007/978-3-319-68210-5_8(87-99)Online publication date: 20-Oct-2017
  • (2021)Novel and Prevalent Techniques for Resolving Control HazardData Engineering for Smart Systems10.1007/978-981-16-2641-8_22(235-244)Online publication date: 14-Nov-2021
  • (2018)A survey of techniques for dynamic branch predictionConcurrency and Computation: Practice and Experience10.1002/cpe.466631:1Online publication date: 2-Sep-2018
  • (2015)An Energy-Efficient Branch Prediction with Grouped Global HistoryProceedings of the 2015 44th International Conference on Parallel Processing (ICPP)10.1109/ICPP.2015.23(140-149)Online publication date: 1-Sep-2015
  • (2013)Multithreading ArchitectureSynthesis Lectures on Computer Architecture10.2200/S00458ED1V01Y201212CAC0218:1(1-109)Online publication date: 15-Jan-2013
  • (2012)Energy-efficient branch prediction with compiler-guided history stackProceedings of the Conference on Design, Automation and Test in Europe10.5555/2492708.2492823(449-454)Online publication date: 12-Mar-2012
  • (2012)Disjoint out-of-order execution processorACM Transactions on Architecture and Code Optimization10.1145/2355585.23555929:3(1-32)Online publication date: 5-Oct-2012
  • (2012)Energy-efficient branch prediction with Compiler-guided History Stack2012 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.1109/DATE.2012.6176513(449-454)Online publication date: Mar-2012
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