research-article

Design and defect tolerance beyond CMOS

Authors:

Xiaobo Sharon Hu,

Alexander Khitun,

Konstantin K. Likharev,

Michael T. Niemier,

Kang WangAuthors Info & Claims

CODES+ISSS '08: Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis

Pages 223 - 230

https://doi.org/10.1145/1450135.1450187

Published: 19 October 2008 Publication History

Abstract

It is well recognized that novel computational models, devices and technologies are needed in order to sustain the remarkable advancement of CMOS-based VLSI circuits and systems. Regardless of the models, devices and technologies, any enhancement/replacement to CMOS must show significant gains in at least one of the key metrics (including speed, power and cost) for at least a subset of application domains currently employing CMOS circuits. In addition, effective defect tolerant techniques are a critical factor for the successful adoption of any new computing device due to the fact that nano-scale structures will have defect rates much higher than today's CMOS chips. The task of identifying application domains that could benefit the most from a new model/device/technology and ensuring that the resultant system meets functional requirements in the presence of defects requires synergistic efforts of physical scientists, and circuit and system design researchers.

This paper contains a collection of three contributions-each focusing on one particular emergent technology-presenting a basic introduction on the technologies, some of their unique features in contrast with CMOS, potential application domains for these technologies, and new opportunities that they may bring forward in defect tolerance design. The contributions include both traditional and nontraditional state representations which use either electronic or magnetic interactions.

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Cited By

Ghofrani ALastras-Montano MCheng K(2013)Towards data reliable crossbar-based memristive memories2013 IEEE International Test Conference (ITC)10.1109/TEST.2013.6651928(1-10)Online publication date: Sep-2013
https://doi.org/10.1109/TEST.2013.6651928
Fei WYu HZhang WYeo K(2012)Design exploration of hybrid CMOS and memristor circuit by new modified nodal analysisIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2011.213644320:6(1012-1025)Online publication date: 1-Jun-2012
https://dl.acm.org/doi/10.1109/TVLSI.2011.2136443
Han SMaune HBarish RBockrath MGoddard W(2012)DNA-Linker-Induced Surface Assembly of Ultra Dense Parallel Single Walled Carbon Nanotube ArraysNano Letters10.1021/nl201818u12:3(1129-1135)Online publication date: 22-Feb-2012
https://doi.org/10.1021/nl201818u

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cover image ACM Conferences

CODES+ISSS '08: Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis

October 2008

288 pages

ISBN:9781605584706

DOI:10.1145/1450135

Program Chairs:
Catherine Gebotys
University of Waterloo, Canada
,
Grant Martin
Tensilica, USA

Copyright © 2008 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 19 October 2008

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CODES+ISSS '08 Paper Acceptance Rate 44 of 143 submissions, 31%;

Overall Acceptance Rate 280 of 864 submissions, 32%

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Cited By

Ghofrani ALastras-Montano MCheng K(2013)Towards data reliable crossbar-based memristive memories2013 IEEE International Test Conference (ITC)10.1109/TEST.2013.6651928(1-10)Online publication date: Sep-2013
https://doi.org/10.1109/TEST.2013.6651928
Fei WYu HZhang WYeo K(2012)Design exploration of hybrid CMOS and memristor circuit by new modified nodal analysisIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2011.213644320:6(1012-1025)Online publication date: 1-Jun-2012
https://dl.acm.org/doi/10.1109/TVLSI.2011.2136443
Han SMaune HBarish RBockrath MGoddard W(2012)DNA-Linker-Induced Surface Assembly of Ultra Dense Parallel Single Walled Carbon Nanotube ArraysNano Letters10.1021/nl201818u12:3(1129-1135)Online publication date: 22-Feb-2012
https://doi.org/10.1021/nl201818u

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