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The effect of interrupts on software pipeline execution on message-passing architectures

Authors:

Rob F. Van der Wijngaart,

Sekhar R. Sarukkai,

Pankaj MehraAuthors Info & Claims

ICS '96: Proceedings of the 10th international conference on Supercomputing

Pages 189 - 196

https://doi.org/10.1145/237578.237603

Published: 01 January 1996 Publication History

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References

[1]

J.S. Ryan, S.K. Weeratunga, _Parallel computation of 3-D Navier-Stokes fiowfields for supersonic vehicles, AIAA 93-0064, 31st Aerospace Sciences Meeting and Exhibit, Reno, NV, January 11-14, 1993]]

Google Scholar

[2]

C.-T. King, W.-H. Chou, L.M. Ni, Pipelmed dataparallel algorithms: Part I ~ Concept and modeling, IEEE Transactions on Parallel and Distributed Systems~ Vol. 1, No. 4, October 1990]]

Digital Library

Google Scholar

[3]

V. Adve et al., Integrated performance analysis of data-parallel programs, Workshop on Debugging and Performance Tuning for Parallel Computing Systems, Chatham, MA, October 3-5, 1994]]

Google Scholar

[4]

S. Hiranandani, K. Kennedy, C-W. Tseng, Evaluation of compiler opt~mizations for Fortran D on MIMD distributed-memory machines, 1992 International Conference on Supercomputing, Washington, DC, July 1992]]

Digital Library

Google Scholar

[5]

D.J. Palermo, tg. Sm J.A. Chandy, P. Banerjee, Communication optimizat~ons used in the PARADIGM compiler for d,stributed-memory multicomputers, International Conference on Parallel Processing, St. Charles, IL, August 1994]]

Digital Library

Google Scholar

[6]

P.K. Dubey and M. J. Flynn, A Bubble propagation model for ptpeline performance, Journal of Parallel and Distributed Computing, 23, 1994.]]

Digital Library

Google Scholar

[7]

J.C. Yah, Performance tuning with AIMS--An automated instrumentation and monztor, ng system for mutticomputers, Proceedings of the 27tn Hawaii International Conference on System Sciences, Vol. II, pp. 625-633, Wailea, HI, January 4-7, 1994.]]

Google Scholar

[8]

R.F. Van der Wijngaart, S.R. Sarukkai, P. Mehra, Analysis and optimtzatzon of software pipeline performance on M~MD parallel computers, submitted for publication to Journal of Parallel and Distributed Computing]]

Digital Library

Google Scholar

[9]

R.F. Van der Wijngaart, Efficient implementation of a 3-dimensional ADI method on the iP$C/$60, Proceedings of Supercomputing '93, pp. 102-111, Portland, OR, November 15-19, 1993]]

Digital Library

Google Scholar

Cited By

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Lowenthal D(2000)Accurately Selecting Block Size at Runtime in Pipelined Parallel ProgramsInternational Journal of Parallel Programming10.1023/A:100757711598028:3(245-274)Online publication date: 1-Jun-2000
https://dl.acm.org/doi/10.1023/A%3A1007577115980
Lowenthal DJames M(1999)Run-time selection of block size in pipelined parallel programsProceedings 13th International Parallel Processing Symposium and 10th Symposium on Parallel and Distributed Processing. IPPS/SPDP 199910.1109/IPPS.1999.760439(82-87)Online publication date: 1999
https://doi.org/10.1109/IPPS.1999.760439
Högstedt KCarter LFerrante JLee PHenglein FJones N(1997)Determining the idle time of a tilingProceedings of the 24th ACM SIGPLAN-SIGACT symposium on Principles of programming languages10.1145/263699.263716(160-173)Online publication date: 1-Jan-1997
https://dl.acm.org/doi/10.1145/263699.263716

Index Terms

The effect of interrupts on software pipeline execution on message-passing architectures
1. General and reference
  1. Cross-computing tools and techniques
    1. Metrics
2. Software and its engineering
  1. Software notations and tools
    1. Compilers

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Published In

ICS '96: Proceedings of the 10th international conference on Supercomputing

January 1996

406 pages

ISBN:0897918037

DOI:10.1145/237578

Chairman:
Pen Chung Yew
Univ. of Minnesota

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

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Published: 01 January 1996

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ICS96: 1996 International Conference on Supercomputing

May 25 - 28, 1996

Pennsylvania, Philadelphia, USA

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ICS '96 Paper Acceptance Rate 50 of 116 submissions, 43%;

Overall Acceptance Rate 629 of 2,180 submissions, 29%

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Lowenthal D(2000)Accurately Selecting Block Size at Runtime in Pipelined Parallel ProgramsInternational Journal of Parallel Programming10.1023/A:100757711598028:3(245-274)Online publication date: 1-Jun-2000
https://dl.acm.org/doi/10.1023/A%3A1007577115980
Lowenthal DJames M(1999)Run-time selection of block size in pipelined parallel programsProceedings 13th International Parallel Processing Symposium and 10th Symposium on Parallel and Distributed Processing. IPPS/SPDP 199910.1109/IPPS.1999.760439(82-87)Online publication date: 1999
https://doi.org/10.1109/IPPS.1999.760439
Högstedt KCarter LFerrante JLee PHenglein FJones N(1997)Determining the idle time of a tilingProceedings of the 24th ACM SIGPLAN-SIGACT symposium on Principles of programming languages10.1145/263699.263716(160-173)Online publication date: 1-Jan-1997
https://dl.acm.org/doi/10.1145/263699.263716

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By-passing the out-of-order execution pipeline to increase energy-efficiency

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