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Ambipolar independent double gate FET logic

Published: 04 July 2012 Publication History

Abstract

In this work, we present a review of recent logic circuit design research using ambipolar independent double gate field effect transistors (Am-ICDGFETs). In a first approach, we examine compact logic and show that, with respect to conventional CMOS-like static logic structures and for comparable power consumption, time delay and integration density can be reduced by 25% and 45% respectively. We then turn to reconfigurability, and demonstrate a key use of ambipolarity in a 16-function dynamically reconfigurable logic cell based on a sum-of-products Boolean function implementation, which achieves remarkable gains in terms of power consumption (9x) and in terms of intrinsic time delay (5x) with respect to conventional 16nm LP CMOS-based look-up table circuits. Finally, we tackle the question of logic synthesis for design paradigms using such fine-grain reconfigurable cells, and show how binary decision diagrams can be adapted to this purpose to generate, in a flexible way, multiple input selective function sets. Using this technique, a generated circuit was also evaluated and shown to compare very favorably to its CMOS equivalent.

References

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Ben Jamaa, M. H., et al. 2011. FPGA Design with Double-Gate Carbon Nanotube Transistors. ECS Transactions. 34, 1, 1005--1010.
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http://ptm.asu.edu/modelcard/LP/16nm_LP.pm

Cited By

View all
  • (2023)Implementation of Ambipolar CNTFET based logic gates and their performance comparison with CNTFET and CMOS based logic gates2023 International Conference on Recent Advances in Electrical, Electronics & Digital Healthcare Technologies (REEDCON)10.1109/REEDCON57544.2023.10150505(56-61)Online publication date: 1-May-2023
  • (2023)ConclusionDesign Automation and Applications for Emerging Reconfigurable Nanotechnologies10.1007/978-3-031-37924-6_8(175-182)Online publication date: 20-Jun-2023
  • (2023)Exploring Circuit Design Topologies for RFETsDesign Automation and Applications for Emerging Reconfigurable Nanotechnologies10.1007/978-3-031-37924-6_3(43-63)Online publication date: 20-Jun-2023
  • Show More Cited By

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      cover image ACM Conferences
      NANOARCH '12: Proceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures
      July 2012
      243 pages
      ISBN:9781450316712
      DOI:10.1145/2765491
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      Publication History

      Published: 04 July 2012

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      Author Tags

      1. ambipolarity
      2. binary decision diagrams
      3. carbon nanotubes
      4. logic synthesis
      5. reconfigurable logic
      6. standard cells

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      • French National Research Agency

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      Overall Acceptance Rate 55 of 87 submissions, 63%

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      View all
      • (2023)Implementation of Ambipolar CNTFET based logic gates and their performance comparison with CNTFET and CMOS based logic gates2023 International Conference on Recent Advances in Electrical, Electronics & Digital Healthcare Technologies (REEDCON)10.1109/REEDCON57544.2023.10150505(56-61)Online publication date: 1-May-2023
      • (2023)ConclusionDesign Automation and Applications for Emerging Reconfigurable Nanotechnologies10.1007/978-3-031-37924-6_8(175-182)Online publication date: 20-Jun-2023
      • (2023)Exploring Circuit Design Topologies for RFETsDesign Automation and Applications for Emerging Reconfigurable Nanotechnologies10.1007/978-3-031-37924-6_3(43-63)Online publication date: 20-Jun-2023
      • (2019)Designing Efficient Circuits Based on Runtime-Reconfigurable Field-Effect TransistorsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2018.288464627:3(560-572)Online publication date: Mar-2019
      • (2017)Transient model with interchangeability for dual-gate ambipolar CNTFET logic design2017 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH)10.1109/NANOARCH.2017.8053711(61-66)Online publication date: Jul-2017
      • (2017)Closed-form model for dual-gate ambipolar CNTFET circuit design2017 IEEE International Symposium on Circuits and Systems (ISCAS)10.1109/ISCAS.2017.8050646(1-4)Online publication date: May-2017

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