No abstract available.
Proceeding Downloads
Dynamic Application-aware Power Capping
A future large-scale high-performance computing (HPC) cluster will likely be power capped since the surrounding infrastructure like power supply and cooling is constrained. For such a cluster, it may be impossible to supply thermal design power (TDP) to ...
Simulating Power Scheduling at Scale
Comparison of power scheduling strategies at scale is challenging due to the limited availability of high performance computing (HPC) systems exposing power control to researchers. In this paper we describe PowSim, a simulator for comparing different ...
Execution Phase Prediction Based on Phase Precursors and Locality
This paper focuses on different methods developed to detect the upcoming execution phase of a workload with regards to power demands. By controlling the state of the processor in power demanding phases, the operating system can maintain a relatively ...
Performance and Power Characteristics and Optimizations of Hybrid MPI/OpenMP LULESH Miniapps under Various Workloads
Energy efficient execution of scientific applications requires insight into how HPC system features affect the performance and power of the applications. In this paper, we analyze and model performance and power characteristics of hybrid MPI/OpenMP ...
Adaptive Time-based Encoding for Energy-Efficient Large Cache Architectures
Demanding larger memory footprint and relying heavily on data locality has made last-level cache (LLC) a major contributor to overall energy consumption in modern computer systems. As a result, numerous techniques have been proposed to reduce power ...
Improving Energy Efficiency in Memory-constrained Applications Using Core-specific Power Control
Power is increasingly the limiting factor in High Performance Computing (HPC) at Exascale and will continue to influence future advancements in supercomputing. Recent processors equipped with on-board hardware counters allow real time monitoring of ...
PoLiMEr: An Energy Monitoring and Power Limiting Interface for HPC Applications
Power and energy consumption are now key design concerns in HPC. To develop software that meets power and energy constraints, scientific application developers must have a reliable way to measure these values and relate them to application-specific ...
PANN: Power Allocation via Neural Networks Dynamic Bounded-Power Allocation in High Performance Computing
Exascale architecture computers will be limited not only by hardware but also by power consumption. In these bounded power situations, a system can deliver better results by overprovisioning -having more hardware than can be fully powered. ...
An empirical survey of performance and energy efficiency variation on Intel processors
Traditional HPC performance and energy characterization approaches assume homogeneity and predictability in the performance of the target processor platform. Consequently, processor performance variation has been considered to be a secondary issue in ...
Scalable performance bounding under multiple constrained renewable resources
In the age of exascale computing, it is crucial to provide the best possible performance under power constraints. A major part of this optimization is managing power and bandwidth intelligently in a cluster to maximize performance. There are significant ...
Index Terms
- Proceedings of the 5th International Workshop on Energy Efficient Supercomputing