FPGA

We are delighted to welcome you to the 2020 ACM International Symposium on Field- Programmable Gate Arrays (ACM FPGA 2020). ACM FPGA is the premiere forum for the presentation of new and exciting research on all aspects of FPGA technology, which include:

• Novel FPGA architectures and circuits.

• Advances in CAD tools for FPGAs, in areas such as technology mapping, placement, routing, and others.

• High-level design methodologies that permit FPGA design at higher levels of abstraction.

• New applications for FPGAs, particularly for energy efficient and high performance computation.

Aside from the technical sessions, the conference provides the opportunity for FPGA researchers and practitioners from around the world to network with long-time friends and make new connections in a beautiful setting. This year, the conference is held in Seaside, California, but remains close to the spectacular coastline of the Monterey Bay and the attractions in the cities of Monterey and Pacific Beach.

This year, the program committee received 149 paper submissions, of which 112 papers met submission guidelines and were reviewed. 25% of reviewed papers were accepted for presentation. This year's program is 3 full days, comprising 21 full research papers (10 pages) and 7 short research papers (6 pages), as well as 3 invited tutorials, 2 invited keynotes, 2 panels, and an invited Session on Security in FPGA Design and Application. The invited session, keynotes, panels, and two of the three tutorials have accompanying material published in the proceedings. In addition, we had 46 submissions presented as posters that appear in these proceedings as an abstract.

For the first time at the FPGA Symposium, accepted research papers were considered for artifact badges based on ACM's Artifact Review and Badging policies. These badges have three categories: Artifacts Evaluated, Artifacts Available, and Results Validated. The artifact evaluation process was open to accepted full and short papers and began after the paper review process had been completed so as to maintain our double blind review process. Six of our accepted research papers were awarded badges that required a team of evaluators to review and sometimes replicate the results of the original authors. Despite the significant work involved for the evaluation team, we believe this process helps improve research repeatability and plan to continue awarding artifact badges in the future.

FPGAs continue to be more widely deployed in data centers, both in a customer-visible use model as FPGAs-as-a-Service and in a behind the scenes Application-as-a-Service model, enabling end applications to be implemented more efficiently. On Sunday afternoon, a panel will discuss potential uses for Datacenter FPGAs outside of Deep Learning. High-Level Synthesis has also become widely used in many applications, yet many data center applications are still built with low-level design techniques. In addition, the system software for these applications is significant and not easily ported from one data center deployment framework to another. The panel discussion, at the Monday evening banquet, will consider how new FPGA device features will be developed and how these new device features will impact the programming models used for FPGA applications. Will FPGAs be able to evolve without radical changes to the way that FPGA design is done?