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A Software Defined High-Speed CameraLink Image Data Transmission System Based on Pixel Clock Recovery

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Abstract

Currently, as a universal camera interface, CameraLink is widely used in real-time image processing systems. Furthermore, it is a parallel interface and transmitted by special cable. As a result, the transmission distance of CameraLink interface is limited. In order to extend the transmission distance of CameraLink image data, there are many types of transmission systems based on the serial communication technology. In this paper, a software defined high-speed CameraLink image data transmission system based on pixel clock recovery is proposed to optimize the existing long distance transmission systems of CameraLink image data. Starting from the application background of the CameraLink protocol and field programmable gate array (FPGA) interface, a software defined CameraLink image data access technology is proposed on the camera side to improve the flexibility and adaptability of the transmission system. Meanwhile, the pixel clock recovery method is designed on the frame grabber side to extract the original CameraLink image data according to GTX and phase locking loop (PLL) inside the FPGA, and this method does not need additional circuits which can effectively reduce the transmission system complexity. In addition, according to the GTX bandwidth, the transmission system can support various parallel data which is not limited to CameraLink image data. Experiment results show that the software defined high-speed CameraLink image data transmission system can accurately transmit CameraLink image data by optic fiber and has a guiding significance for other high-speed parallel data transmission system.

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Correspondence to Kai Wang.

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Jiangyi Qin, Wang, K., Li, X. et al. A Software Defined High-Speed CameraLink Image Data Transmission System Based on Pixel Clock Recovery. Aut. Control Comp. Sci. 56, 403–410 (2022). https://doi.org/10.3103/S014641162205008X

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  • DOI: https://doi.org/10.3103/S014641162205008X

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